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| author | David S. Miller <davem@davemloft.net> | 2017-01-28 10:33:06 -0500 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2017-01-28 10:33:06 -0500 |
| commit | 4e8f2fc1a55d543717efb70e170b09e773d0542b (patch) | |
| tree | 30df1d7fc9dfa24fe2916711a17656682c3f7ec9 /arch/arc/include/asm/cache.h | |
| parent | 158f323b9868b59967ad96957c4ca388161be321 (diff) | |
| parent | 1b1bc42c1692e9b62756323c675a44cb1a1f9dbd (diff) | |
| download | linux-4e8f2fc1a55d543717efb70e170b09e773d0542b.tar.bz2 | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Two trivial overlapping changes conflicts in MPLS and mlx5.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/arc/include/asm/cache.h')
| -rw-r--r-- | arch/arc/include/asm/cache.h | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h index b3410ff6a62d..5008021fba98 100644 --- a/arch/arc/include/asm/cache.h +++ b/arch/arc/include/asm/cache.h @@ -67,7 +67,7 @@ extern unsigned long perip_base, perip_end; #define ARC_REG_IC_PTAG_HI 0x1F /* Bit val in IC_CTRL */ -#define IC_CTRL_CACHE_DISABLE 0x1 +#define IC_CTRL_DIS 0x1 /* Data cache related Auxiliary registers */ #define ARC_REG_DC_BCR 0x72 /* Build Config reg */ @@ -80,8 +80,9 @@ extern unsigned long perip_base, perip_end; #define ARC_REG_DC_PTAG_HI 0x5F /* Bit val in DC_CTRL */ -#define DC_CTRL_INV_MODE_FLUSH 0x40 -#define DC_CTRL_FLUSH_STATUS 0x100 +#define DC_CTRL_DIS 0x001 +#define DC_CTRL_INV_MODE_FLUSH 0x040 +#define DC_CTRL_FLUSH_STATUS 0x100 /*System-level cache (L2 cache) related Auxiliary registers */ #define ARC_REG_SLC_CFG 0x901 @@ -92,8 +93,8 @@ extern unsigned long perip_base, perip_end; #define ARC_REG_SLC_RGN_END 0x916 /* Bit val in SLC_CONTROL */ +#define SLC_CTRL_DIS 0x001 #define SLC_CTRL_IM 0x040 -#define SLC_CTRL_DISABLE 0x001 #define SLC_CTRL_BUSY 0x100 #define SLC_CTRL_RGN_OP_INV 0x200 |