diff options
| author | Alexey Brodkin <abrodkin@synopsys.com> | 2015-04-01 18:51:00 +0530 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2015-06-25 06:00:20 +0530 |
| commit | e0183f523025f96e2053200616a6d602ea2b3451 (patch) | |
| tree | 8d9571f884cab9025c3503bfa913c6094267e639 /arch/arc/boot | |
| parent | a12ebe16a5cea66c17a621ece3a557b8afda2361 (diff) | |
| download | linux-e0183f523025f96e2053200616a6d602ea2b3451.tar.bz2 | |
ARC: [axs101] Prepare for AXS103
To avoid duplicating the MB DTS file, move the MB intc entry into cpu
card specific file
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/boot')
| -rw-r--r-- | arch/arc/boot/dts/axc001.dtsi | 21 | ||||
| -rw-r--r-- | arch/arc/boot/dts/axs10x_mb.dtsi | 17 |
2 files changed, 21 insertions, 17 deletions
diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi index 6990ca45fc7b..a5e2726a067e 100644 --- a/arch/arc/boot/dts/axc001.dtsi +++ b/arch/arc/boot/dts/axc001.dtsi @@ -69,6 +69,27 @@ }; }; + /* + * This INTC is actually connected to DW APB GPIO + * which acts as a wire between MB INTC and CPU INTC. + * GPIO INTC is configured in platform init code + * and here we mimic direct connection from MB INTC to + * CPU INTC, thus we set "interrupts = <7>" instead of + * "interrupts = <12>" + * + * This intc actually resides on MB, but we move it here to + * avoid duplicating the MB dtsi file given that IRQ from + * this intc to cpu intc are different for axs101 and axs103 + */ + mb_intc: dw-apb-ictl@0xe0012000 { + #interrupt-cells = <1>; + compatible = "snps,dw-apb-ictl"; + reg = < 0xe0012000 0x200 >; + interrupt-controller; + interrupt-parent = <&cpu_intc>; + interrupts = < 7 >; + }; + memory { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi index 5d06f1fb4266..f3db32154973 100644 --- a/arch/arc/boot/dts/axs10x_mb.dtsi +++ b/arch/arc/boot/dts/axs10x_mb.dtsi @@ -36,23 +36,6 @@ }; }; - /* - * This INTC is actually connected to DW APB GPIO - * which acts as a wire between MB INTC and CPU INTC. - * GPIO INTC is configured in platform init code - * and here we mimic direct connection from MB INTC to - * CPU INTC, thus we set "interrupts = <7>" instead of - * "interrupts = <12>" - */ - mb_intc: dw-apb-ictl@0x12000 { - #interrupt-cells = <1>; - compatible = "snps,dw-apb-ictl"; - reg = < 0x12000 0x200 >; - interrupt-controller; - interrupt-parent = <&cpu_intc>; - interrupts = < 7 >; - }; - ethernet@0x18000 { #interrupt-cells = <1>; compatible = "snps,dwmac"; |