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authorEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>2017-11-14 17:32:13 +0300
committerVineet Gupta <vgupta@synopsys.com>2017-11-15 09:40:43 -0800
commitff64d695f92123f7d341473921a46add51a44a87 (patch)
tree4ed75460120b1381a79f1c2d0559c676ccad9f53 /arch/arc/boot
parentf3156851616b4f3cb1d6c567fe46adcfd43ad8f8 (diff)
downloadlinux-ff64d695f92123f7d341473921a46add51a44a87.tar.bz2
ARC: [plat-axs10x] DTS: Add reset controller node to manage ethernet reset
DW ethernet controller on axs10x hangs sometimes after SW reset. Invoke the newly aded driver (reset-axs10x.c) by adding the DT bits. With this in place, we don't need the open-coded quirk in platform code, so get rid of it as well ! Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/boot')
-rw-r--r--arch/arc/boot/dts/axs10x_mb.dtsi8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi
index e114000a84f5..74d070cd3c13 100644
--- a/arch/arc/boot/dts/axs10x_mb.dtsi
+++ b/arch/arc/boot/dts/axs10x_mb.dtsi
@@ -16,6 +16,12 @@
ranges = <0x00000000 0x0 0xe0000000 0x10000000>;
interrupt-parent = <&mb_intc>;
+ creg_rst: reset-controller@11220 {
+ compatible = "snps,axs10x-reset";
+ #reset-cells = <1>;
+ reg = <0x11220 0x4>;
+ };
+
i2sclk: i2sclk@100a0 {
compatible = "snps,axs10x-i2s-pll-clock";
reg = <0x100a0 0x10>;
@@ -73,6 +79,8 @@
clocks = <&apbclk>;
clock-names = "stmmaceth";
max-speed = <100>;
+ resets = <&creg_rst 5>;
+ reset-names = "stmmaceth";
};
ehci@0x40000 {