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author | Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> | 2017-09-22 19:49:11 +0300 |
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committer | Vineet Gupta <vgupta@synopsys.com> | 2017-10-06 08:59:54 -0700 |
commit | ab8eb7db1dcc03e7ae9eb379884fd701af6b1a38 (patch) | |
tree | 48c1efef1bc88a7e5d1b167199d0648d94abcbe5 /arch/arc/boot/dts | |
parent | edb40d74c08edfd049cbba15479dadd9aeb7d307 (diff) | |
download | linux-ab8eb7db1dcc03e7ae9eb379884fd701af6b1a38.tar.bz2 |
ARC: [plat-hsdk]: Add reset controller node to manage ethernet reset
DW ethernet controller on HSDK hangs sometimes after SW reset, so
add reset node to make possible to reset DW ethernet controller HW.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/boot/dts')
-rw-r--r-- | arch/arc/boot/dts/hsdk.dts | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arc/boot/dts/hsdk.dts b/arch/arc/boot/dts/hsdk.dts index b922f3faf554..8adde1b492f1 100644 --- a/arch/arc/boot/dts/hsdk.dts +++ b/arch/arc/boot/dts/hsdk.dts @@ -12,6 +12,7 @@ /dts-v1/; #include <dt-bindings/net/ti-dp83867.h> +#include <dt-bindings/reset/snps,hsdk-reset.h> / { model = "snps,hsdk"; @@ -102,6 +103,12 @@ ranges = <0x00000000 0xf0000000 0x10000000>; + cgu_rst: reset-controller@8a0 { + compatible = "snps,hsdk-reset"; + #reset-cells = <1>; + reg = <0x8A0 0x4>, <0xFF0 0x4>; + }; + core_clk: core-clk@0 { compatible = "snps,hsdk-core-pll-clock"; reg = <0x00 0x10>, <0x14B8 0x4>; @@ -158,6 +165,8 @@ clocks = <&gmacclk>; clock-names = "stmmaceth"; phy-handle = <&phy0>; + resets = <&cgu_rst HSDK_ETH_RESET>; + reset-names = "stmmaceth"; mdio { #address-cells = <1>; |