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authorXingyu Chen <xingyu.chen@amlogic.com>2019-06-08 21:04:10 +0200
committerMarc Zyngier <marc.zyngier@arm.com>2019-06-11 12:19:22 +0100
commitc64a9e804ccf86eb202bfd1c6a8c5233c75a0431 (patch)
tree60cc62e3b2c037f6bf6d296e2d5a11f5cd4a782b /README
parent5028bd68155985d3d9bc1af570349d7c56608897 (diff)
downloadlinux-c64a9e804ccf86eb202bfd1c6a8c5233c75a0431.tar.bz2
irqchip/meson-gpio: Add support for Meson-G12A SoC
The Meson-G12A SoC uses the same GPIO interrupt controller IP block as the other Meson SoCs, A totle of 100 pins can be spied on, which is the sum of: - 223:100 undefined (no interrupt) - 99:97 3 pins on bank GPIOE - 96:77 20 pins on bank GPIOX - 76:61 16 pins on bank GPIOA - 60:53 8 pins on bank GPIOC - 52:37 16 pins on bank BOOT - 36:28 9 pins on bank GPIOH - 27:12 16 pins on bank GPIOZ - 11:0 12 pins in the AO domain Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com> Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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