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| author | Asai Thambi S P <asamymuthupa@micron.com> | 2014-03-13 18:45:15 -0700 |
|---|---|---|
| committer | Jens Axboe <axboe@fb.com> | 2014-04-22 19:48:52 -0600 |
| commit | d1e714db8129a1d3670e449b87719c78e2c76f9f (patch) | |
| tree | 34ed981357620ab4d648edc4d680d85f079e2a51 /Documentation | |
| parent | af5ded8ccf21627f9614afc03b356712666ed225 (diff) | |
| download | linux-d1e714db8129a1d3670e449b87719c78e2c76f9f.tar.bz2 | |
mtip32xx: Fix ERO and NoSnoop values in PCIe upstream on AMD systems
A hardware quirk in P320h/P420m interfere with PCIe transactions on some
AMD chipsets, making P320h/P420m unusable. This workaround is to disable
ERO and NoSnoop bits in the parent and root complex for normal
functioning of these devices
NOTE: This workaround is specific to AMD chipset with a PCIe upstream
device with device id 0x5aXX
Signed-off-by: Asai Thambi S P <asamymuthupa@micron.com>
Signed-off-by: Sam Bradshaw <sbradshaw@micron.com>
Cc: stable@kernel.org
Signed-off-by: Jens Axboe <axboe@fb.com>
Diffstat (limited to 'Documentation')
0 files changed, 0 insertions, 0 deletions