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| author | Sowjanya Komatineni <skomatineni@nvidia.com> | 2019-04-04 17:14:08 -0700 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2019-04-08 14:12:26 +0700 |
| commit | 9d199231b000414e420a35912760f2d67e9c56d7 (patch) | |
| tree | 8cba37fd6bfb4e6f5e5bdf152647282c085753c4 /Documentation | |
| parent | 9877a347f2056f7aa4e770de9a20048ad288f545 (diff) | |
| download | linux-9d199231b000414e420a35912760f2d67e9c56d7.tar.bz2 | |
spi: tegra114: add 3 wire transfer mode support
This patch adds 3 wire transfer support to SPI mode list along with
its implementation.
3 wire or Bi-directional mode uses only one serial data pin for the
transfer. SPI in master mode uses MOSI data line only and MISO data
line is not used.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation')
0 files changed, 0 insertions, 0 deletions