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author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-01-29 11:30:16 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-01-29 11:30:16 -0800 |
commit | 8e3264710c1c5a3052618bb1b5ef11e13c67a932 (patch) | |
tree | 8f8f2b7ae02cefed146dc9457d023b378a43a590 /Documentation | |
parent | 0bae60fceeab6958ecd56ba5dbb41fb199babec3 (diff) | |
parent | 35a8f1a94d12631afcd55a2a518faa112324f8d1 (diff) | |
download | linux-8e3264710c1c5a3052618bb1b5ef11e13c67a932.tar.bz2 |
Merge tag 'spi-v4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"Quite a quiet release for SPI, there are no changes at all to the core
and not that many changes to drivers. Highlights of those driver
changes include:
- SH MSIOF support for GPIO chip selects contributed by Geert
Uytterhoeven.
- Full duplex support for a3700 contributed by Maxime Chevallier.
- Support for DMA transfers on Atmel devices that require a bounce
buffer contributed by Radu Pirea"
* tag 'spi-v4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (31 commits)
spi: dw: Remove unused members from struct chip_data
spi: orion: Fix a resource leak if the optional "axi" clk is deferred
spi: a3700: Remove endianness swapping for full-duplex transfers
spi: a3700: Remove endianness swapping functions when accessing FIFOs
spi: a3700: Add full-duplex support
spi: a3700: Allow to enable or disable FIFO mode
spi: a3700: Set frequency limits at startup
spi: a3700: Clear DATA_OUT when performing a read
spi: orion: Fix clock resource by adding an optional bus clock
spi: s3c64xx: add SPDX identifier
spi: imx: do not access registers while clocks disabled
spi: atmel: Implements transfers with bounce buffer
spi: sh-msiof: Fix timeout failures for TX-only DMA transfers
spi: spi-fsl-dspi: account for const type of of_device_id.data
spi: bcm53xx: simplify reading SPI data
spi: sirf: account for const type of of_device_id.data
spi: pxa2xx: Use gpiod_put() not gpiod_free()
spi: pxa2xx: avoid redundant gpio_to_desc(desc_to_gpio()) round-trip
spi: sh-msiof: Document hardware limitations related to chip selects
spi: sh-msiof: Implement cs-gpios configuration
...
Diffstat (limited to 'Documentation')
4 files changed, 28 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/spi/sh-msiof.txt b/Documentation/devicetree/bindings/spi/sh-msiof.txt index bdd83959019c..80710f0f0448 100644 --- a/Documentation/devicetree/bindings/spi/sh-msiof.txt +++ b/Documentation/devicetree/bindings/spi/sh-msiof.txt @@ -36,7 +36,21 @@ Required properties: Optional properties: - clocks : Must contain a reference to the functional clock. -- num-cs : Total number of chip-selects (default is 1) +- num-cs : Total number of chip selects (default is 1). + Up to 3 native chip selects are supported: + 0: MSIOF_SYNC + 1: MSIOF_SS1 + 2: MSIOF_SS2 + Hardware limitations related to chip selects: + - Native chip selects are always deasserted in + between transfers that are part of the same + message. Use cs-gpios to work around this. + - All slaves using native chip selects must use the + same spi-cs-high configuration. Use cs-gpios to + work around this. + - When using GPIO chip selects, at least one native + chip select must be left unused, as it will be + driven anyway. - dmas : Must contain a list of two references to DMA specifiers, one for transmission, and one for reception. diff --git a/Documentation/devicetree/bindings/spi/spi-meson.txt b/Documentation/devicetree/bindings/spi/spi-meson.txt index 825c39cae74a..b7f5e86fed22 100644 --- a/Documentation/devicetree/bindings/spi/spi-meson.txt +++ b/Documentation/devicetree/bindings/spi/spi-meson.txt @@ -27,7 +27,9 @@ The Meson SPICC is generic SPI controller for general purpose Full-Duplex communications with dedicated 16 words RX/TX PIO FIFOs. Required properties: - - compatible: should be "amlogic,meson-gx-spicc" on Amlogic GX SoCs. + - compatible: should be: + "amlogic,meson-gx-spicc" on Amlogic GX and compatible SoCs. + "amlogic,meson-axg-spicc" on Amlogic AXG and compatible SoCs - reg: physical base address and length of the controller registers - interrupts: The interrupt specifier - clock-names: Must contain "core" diff --git a/Documentation/devicetree/bindings/spi/spi-orion.txt b/Documentation/devicetree/bindings/spi/spi-orion.txt index df8ec31f2f07..8434a65fc12a 100644 --- a/Documentation/devicetree/bindings/spi/spi-orion.txt +++ b/Documentation/devicetree/bindings/spi/spi-orion.txt @@ -18,8 +18,17 @@ Required properties: The eight register sets following the control registers refer to chip-select lines 0 through 7 respectively. - cell-index : Which of multiple SPI controllers is this. +- clocks : pointers to the reference clocks for this device, the first + one is the one used for the clock on the spi bus, the + second one is optional and is the clock used for the + functional part of the controller + Optional properties: - interrupts : Is currently not used. +- clock-names : names of used clocks, mandatory if the second clock is + used, the name must be "core", and "axi" (the latter + is only for Armada 7K/8K). + Example: spi@10600 { diff --git a/Documentation/devicetree/bindings/spi/spi-xilinx.txt b/Documentation/devicetree/bindings/spi/spi-xilinx.txt index c7b7856bd528..7bf61efc66c8 100644 --- a/Documentation/devicetree/bindings/spi/spi-xilinx.txt +++ b/Documentation/devicetree/bindings/spi/spi-xilinx.txt @@ -2,7 +2,7 @@ Xilinx SPI controller Device Tree Bindings ------------------------------------------------- Required properties: -- compatible : Should be "xlnx,xps-spi-2.00.a" or "xlnx,xps-spi-2.00.b" +- compatible : Should be "xlnx,xps-spi-2.00.a", "xlnx,xps-spi-2.00.b" or "xlnx,axi-quad-spi-1.00.a" - reg : Physical base address and size of SPI registers map. - interrupts : Property with a value describing the interrupt number. |