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author | Linus Torvalds <torvalds@linux-foundation.org> | 2020-04-10 12:55:20 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2020-04-10 12:55:20 -0700 |
commit | 75bdc9293dfd1c1dea297bbc65b37c7f6dcb2bd6 (patch) | |
tree | 3dd3f625688f2a473609a2caa5cd1e20f12345ed /Documentation | |
parent | 6900433e0fbca146d8170bdf876271cdf3053021 (diff) | |
parent | 9cc5f232a4b6a0ef6e9b57876d61b88f61bdd7c2 (diff) | |
download | linux-75bdc9293dfd1c1dea297bbc65b37c7f6dcb2bd6.tar.bz2 |
Merge tag 'pwm/for-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"There's quite a few changes this time around.
Most of these are fixes and cleanups, but there's also new chip
support for some drivers and a bit of rework"
* tag 'pwm/for-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (33 commits)
pwm: pca9685: Fix PWM/GPIO inter-operation
pwm: Make pwm_apply_state_debug() static
pwm: meson: Remove redundant assignment to variable fin_freq
pwm: jz4740: Allow selection of PWM channels 0 and 1
pwm: jz4740: Obtain regmap from parent node
pwm: jz4740: Improve algorithm of clock calculation
pwm: jz4740: Use clocks from TCU driver
pwm: sun4i: Remove redundant needs_delay
pwm: omap-dmtimer: Implement .apply callback
pwm: omap-dmtimer: Do not disable PWM before changing period/duty_cycle
pwm: omap-dmtimer: Fix PWM enabling sequence
pwm: omap-dmtimer: Update description for PWM OMAP DM timer
pwm: omap-dmtimer: Drop unused header file
pwm: renesas-tpu: Drop confusing registered message
pwm: renesas-tpu: Fix late Runtime PM enablement
pwm: rcar: Fix late Runtime PM enablement
dt-bindings: pwm: renesas-tpu: Document more R-Car Gen2 support
pwm: meson: Fix confusing indentation
pwm: pca9685: Use gpio core provided macro GPIO_LINE_DIRECTION_OUT
pwm: pca9685: Replace CONFIG_PM with __maybe_unused
...
Diffstat (limited to 'Documentation')
3 files changed, 41 insertions, 23 deletions
diff --git a/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.txt b/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.txt deleted file mode 100644 index 472bd46ab5a4..000000000000 --- a/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.txt +++ /dev/null @@ -1,23 +0,0 @@ -* PWM controlled by ChromeOS EC - -Google's ChromeOS EC PWM is a simple PWM attached to the Embedded Controller -(EC) and controlled via a host-command interface. - -An EC PWM node should be only found as a sub-node of the EC node (see -Documentation/devicetree/bindings/mfd/cros-ec.txt). - -Required properties: -- compatible: Must contain "google,cros-ec-pwm" -- #pwm-cells: Should be 1. The cell specifies the PWM index. - -Example: - cros-ec@0 { - compatible = "google,cros-ec-spi"; - - ... - - cros_ec_pwm: ec-pwm { - compatible = "google,cros-ec-pwm"; - #pwm-cells = <1>; - }; - }; diff --git a/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml b/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml new file mode 100644 index 000000000000..24c217b76580 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/google,cros-ec-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PWM controlled by ChromeOS EC + +maintainers: + - Thierry Reding <thierry.reding@gmail.com> + - '"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>' + +description: | + Google's ChromeOS EC PWM is a simple PWM attached to the Embedded Controller + (EC) and controlled via a host-command interface. + An EC PWM node should be only found as a sub-node of the EC node (see + Documentation/devicetree/bindings/mfd/cros-ec.txt). + +properties: + compatible: + const: google,cros-ec-pwm + "#pwm-cells": + description: The cell specifies the PWM index. + const: 1 + +required: + - compatible + - '#pwm-cells' + +additionalProperties: false + +examples: + - | + cros-ec@0 { + compatible = "google,cros-ec-spi"; + cros_ec_pwm: ec-pwm { + compatible = "google,cros-ec-pwm"; + #pwm-cells = <1>; + }; + }; diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt index 0a69eadf44ce..74c41e34c3b6 100644 --- a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt +++ b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt @@ -9,6 +9,7 @@ Required properties: - "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for Tegra132 - "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210 - "nvidia,tegra186-pwm": for Tegra186 + - "nvidia,tegra194-pwm": for Tegra194 - reg: physical base address and length of the controller's registers - #pwm-cells: should be 2. See pwm.yaml in this directory for a description of the cells format. |