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authorDeepak SIKRI <deepak.sikri@st.com>2012-04-04 04:33:20 +0000
committerDavid S. Miller <davem@davemloft.net>2012-04-04 18:39:23 -0400
commit55f9a4d6facb35198ddb88a8fe21ca2ee753af7a (patch)
tree7d5117dcf6ec24bb4b501d95992d3ce25725ce4b /Documentation
parentf142af2e2064546ac470e8690acbd189b3584e67 (diff)
downloadlinux-55f9a4d6facb35198ddb88a8fe21ca2ee753af7a.tar.bz2
stmmac: Define CSUM offload engine Types
This patch explicitly defines the CSUM offload engine type which need (not mandatory) to be passed from the platform code. STMMAC core supports two check sum offload engine types- Type-1 & Type-2. Also, there are STMMAC cores that do not have the check sum offload capabilities. The behaviour of Type-1 & Type-2 cores related to provision of checksum increases the packet length for Type-1 cores by 2, as the checksum is appended at the end of data packet and the same is made accountable in the DMA status. The STMMAC cores beyond Version-3.5 provide HW interface registers which allows the user to read the HW capabilities, while to support the previous cores the information related to HW capabilities has to be provided from the platform code. The Type-1 cores which do not have the HW register interface need this information. This patch also updates the driver's doc. Signed-off-by: Deepak Sikri <deepak.sikri@st.com> Hacked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/networking/stmmac.txt3
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/networking/stmmac.txt b/Documentation/networking/stmmac.txt
index d0aeeadd264b..61f40a3fa7ea 100644
--- a/Documentation/networking/stmmac.txt
+++ b/Documentation/networking/stmmac.txt
@@ -116,6 +116,7 @@ and detailed below as well:
int has_gmac;
int enh_desc;
int tx_coe;
+ int rx_coe;
int bugged_jumbo;
int pmt;
int force_sf_dma_mode;
@@ -140,6 +141,8 @@ Where:
o has_gmac: uses the GMAC core.
o enh_desc: if sets the MAC will use the enhanced descriptor structure.
o tx_coe: core is able to perform the tx csum in HW.
+ o rx_coe: the supports three check sum offloading engine types:
+ type_1, type_2 (full csum) and no RX coe.
o bugged_jumbo: some HWs are not able to perform the csum in HW for
over-sized frames due to limited buffer sizes.
Setting this flag the csum will be done in SW on