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| author | Liran Alon <liran.alon@oracle.com> | 2018-05-26 21:19:12 +0300 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2018-06-01 19:18:27 +0200 |
| commit | 7f4693b8bbcee73f05fdd45aea7cfd6a5e1d53c7 (patch) | |
| tree | d6224b973a9c2128315e4e9453a2ab7025d8a4ec /Documentation/virtual | |
| parent | 929f45e32499171ce3e5a15db972256eac513ad7 (diff) | |
| download | linux-7f4693b8bbcee73f05fdd45aea7cfd6a5e1d53c7.tar.bz2 | |
KVM: docs: mmu: KVM support exposing SLAT to guests
Fix outdated statement that KVM is not able to expose SLAT
(Second-Layer-Address-Translation) to guests.
This was implemented a long time ago...
Signed-off-by: Liran Alon <liran.alon@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'Documentation/virtual')
| -rw-r--r-- | Documentation/virtual/kvm/mmu.txt | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/virtual/kvm/mmu.txt b/Documentation/virtual/kvm/mmu.txt index 4a81bcc96bd6..e507a9e0421e 100644 --- a/Documentation/virtual/kvm/mmu.txt +++ b/Documentation/virtual/kvm/mmu.txt @@ -49,8 +49,8 @@ The mmu supports first-generation mmu hardware, which allows an atomic switch of the current paging mode and cr3 during guest entry, as well as two-dimensional paging (AMD's NPT and Intel's EPT). The emulated hardware it exposes is the traditional 2/3/4 level x86 mmu, with support for global -pages, pae, pse, pse36, cr0.wp, and 1GB pages. Work is in progress to support -exposing NPT capable hardware on NPT capable hosts. +pages, pae, pse, pse36, cr0.wp, and 1GB pages. Emulated hardware also +able to expose NPT capable hardware on NPT capable hosts. Translation =========== |