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author | Stephen Boyd <sboyd@kernel.org> | 2020-10-20 11:47:07 -0700 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2020-10-20 11:47:07 -0700 |
commit | 5f56888fad46812bab9ecb455d92da675ef4fbd0 (patch) | |
tree | 445984b8ebe59e91605ec1a38d3778cf1c45d2bf /Documentation/userspace-api/media/v4l/dev-event.rst | |
parent | 97f2f490c1a46e5e2e80b5c423fe1f4e11b65ac1 (diff) | |
parent | 1a3c4dd4e1633a4482df6dd030a365de6f26de2c (diff) | |
parent | fcedb589b5a88d73d3155c4a8690d6dda91a3156 (diff) | |
parent | f6bade6875d7458e7f395d6a1bc317a1caecbc1d (diff) | |
parent | b159c63d82ff8ffddc6c6f0eb881b113b36ecad7 (diff) | |
parent | fda48bf5c86d88fd7074e318f290ad636dff4eaa (diff) | |
parent | eff06bd5e5f63b14ea1ad97fbb07bd41d92d323d (diff) | |
parent | f6c992ca7dd4f49042eec61f3fb426c94d901675 (diff) | |
download | linux-5f56888fad46812bab9ecb455d92da675ef4fbd0.tar.bz2 |
Merge branches 'clk-ingenic', 'clk-at91', 'clk-kconfig', 'clk-imx', 'clk-qcom', 'clk-prima2' and 'clk-bcm' into clk-next
- Support qcom SM8150/SM8250 video and display clks
- Change how qcom's display port clks work
* clk-ingenic:
clk: ingenic: Respect CLK_SET_RATE_PARENT in .round_rate
clk: ingenic: Don't tag custom clocks with CLK_SET_RATE_PARENT
clk: ingenic: Don't use CLK_SET_RATE_GATE for PLL
clk: ingenic: Use readl_poll_timeout instead of custom loop
clk: ingenic: Use to_clk_info() macro for all clocks
* clk-at91:
clk: at91: sam9x60: support only two programmable clocks
clk: at91: clk-sam9x60-pll: remove unused variable
clk: at91: clk-main: update key before writing AT91_CKGR_MOR
clk: at91: remove the checking of parent_name
* clk-kconfig:
clk: Restrict CLK_HSDK to ARC_SOC_HSDK
* clk-imx:
clk: imx8mq: Fix usdhc parents order
clk: imx: imx21: Remove clock driver
clk: imx: gate2: Fix a few typos
clk: imx: Fix and update kerneldoc
clk: imx: fix i.MX7D peripheral clk mux flags
clk: imx: fix composite peripheral flags
clk: imx: Correct the memrepair clock on imx8mp
clk: imx: Correct the root clk of media ldb on imx8mp
clk: imx: vf610: Add CRC clock
clk: imx: Explicitly include bits.h
clk: imx8qxp: Support building i.MX8QXP clock driver as module
clk: imx8m: Support module build
clk: imx: Add clock configuration for ARMv7 platforms
clk: imx: Support building i.MX common clock driver as module
clk: composite: Export clk_hw_register_composite()
clk: imx6sl: Use BIT(x) to avoid shifting signed 32-bit value by 31 bits
* clk-qcom:
clk: qcom: gdsc: Keep RETAIN_FF bit set if gdsc is already on
clk: qcom: Add display clock controller driver for SM8150 and SM8250
dt-bindings: clock: add QCOM SM8150 and SM8250 display clock bindings
clk: qcom: add video clock controller driver for SM8250
clk: qcom: add video clock controller driver for SM8150
dt-bindings: clock: add SM8250 QCOM video clock bindings
dt-bindings: clock: add SM8150 QCOM video clock bindings
dt-bindings: clock: combine qcom,sdm845-videocc and qcom,sc7180-videocc
clk: qcom: gcc-msm8994: Add missing clocks, resets and GDSCs
clk/qcom: fix spelling typo
clk: qcom: gcc-sdm660: Fix wrong parent_map
clk: qcom: dispcc: Update DP clk ops for phy design
clk: qcom: gcc-msm8939: remove defined but not used variables
clk: qcom: ipq8074: make pcie0_rchng_clk_src static
* clk-prima2:
clk: clk-prima2: fix return value check in prima2_clk_init()
* clk-bcm:
clk: bcm2835: add missing release if devm_clk_hw_register fails
clk: bcm: rpi: Add register to control pixel bvb clk