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| author | Alexander Duyck <alexander.h.duyck@intel.com> | 2011-06-29 05:43:27 +0000 |
|---|---|---|
| committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2011-08-29 01:04:12 -0700 |
| commit | 7f9643fd773a372a5470ed2daedaec5bac918e35 (patch) | |
| tree | 422c3b40bc5c983d4dc65e91df2462f1fcc2123f /Documentation/mips | |
| parent | 7ac2ed0ceeafa130f85aa947b271b571c68b9e75 (diff) | |
| download | linux-7f9643fd773a372a5470ed2daedaec5bac918e35.tar.bz2 | |
ixgbe: Add support for setting CC bit when SR-IOV is enabled
This change makes it so that the CC bit in the descriptor is set when
SR-IOV is enabled. This is needed in order to support offloading
functionality when passing traffic over the internal TX switch.
Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'Documentation/mips')
0 files changed, 0 insertions, 0 deletions