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authorPaul E. McKenney <paulmck@linux.vnet.ibm.com>2015-12-29 16:23:18 -0800
committerPaul E. McKenney <paulmck@linux.vnet.ibm.com>2016-03-14 15:52:16 -0700
commit7817b799ed6b270fbf7f2b30efd0ae011dfc9644 (patch)
tree6f83b4f9f823160fb20b6896ea7f3be7d6fdb633 /Documentation/memory-barriers.txt
parent92e963f50fc74041b5e9e744c330dca48e04f08d (diff)
downloadlinux-7817b799ed6b270fbf7f2b30efd0ae011dfc9644.tar.bz2
documentation: Fix control dependency and identical stores
The summary of the "CONTROL DEPENDENCIES" section incorrectly states that barrier() may be used to prevent compiler reordering when more than one leg of the control-dependent "if" statement start with identical stores. This is incorrect at high optimization levels. This commit therefore updates the summary to match the detailed description. Reported by: Jianyu Zhan <nasa4836@gmail.com> Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Diffstat (limited to 'Documentation/memory-barriers.txt')
-rw-r--r--Documentation/memory-barriers.txt10
1 files changed, 7 insertions, 3 deletions
diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt
index 904ee42d078e..e26058d3e253 100644
--- a/Documentation/memory-barriers.txt
+++ b/Documentation/memory-barriers.txt
@@ -800,9 +800,13 @@ In summary:
use smp_rmb(), smp_wmb(), or, in the case of prior stores and
later loads, smp_mb().
- (*) If both legs of the "if" statement begin with identical stores
- to the same variable, a barrier() statement is required at the
- beginning of each leg of the "if" statement.
+ (*) If both legs of the "if" statement begin with identical stores to
+ the same variable, then those stores must be ordered, either by
+ preceding both of them with smp_mb() or by using smp_store_release()
+ to carry out the stores. Please note that it is -not- sufficient
+ to use barrier() at beginning of each leg of the "if" statement,
+ as optimizing compilers do not necessarily respect barrier()
+ in this case.
(*) Control dependencies require at least one run-time conditional
between the prior load and the subsequent store, and this