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author | Linus Torvalds <torvalds@linux-foundation.org> | 2016-10-05 11:37:14 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-10-05 11:37:14 -0700 |
commit | d268dbe76a53d72cc41316eb59e7968db60e77ad (patch) | |
tree | c79635239b3e7c7decdb883efd64cb315a184af5 /Documentation/gpio/driver.txt | |
parent | 64cbd16a8751fde075aa103dc7823a8c05805104 (diff) | |
parent | 6bcf3f63394b9c4f133e4499349d786d7f531473 (diff) | |
download | linux-d268dbe76a53d72cc41316eb59e7968db60e77ad.tar.bz2 |
Merge tag 'pinctrl-v4.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for the v4.9 cycle.
General improvements:
- nicer debugfs output with one pin/config pair per line.
- continued efforts to strictify module vs bool.
- constification and similar from Coccinelle engineers.
- return error from pinctrl_bind_pins()
- pulling in the ability to selectively disable mapping of unusable
IRQs from the GPIO subsystem.
New drivers:
- new driver for the Aspeed pin controller family: AST2400 (G4) and
AST2500 (G5) are supported. These are used by OpenBMC on the IBM
Witherspoon platform.
- new subdriver for the Allwinner sunxi GR8.
Driver improvements:
- drop default IRQ trigger types assigned during IRQ mapping on AT91
and Nomadik. This error was identified by improvements in the IRQ
core by Marc Zyngier.
- active high/low types on the GPIO IRQs for the ST pin controller.
- IRQ support on GPIOs on the STM32 pin controller.
- Renesas Super-H/ARM sh-pfc: continued massive developments.
- misc MXC improvements.
- SPDIF on the Allwiner A31 SoC
- IR remote and SPI NOR flash, NAND flash, I2C pins on the AMLogic
SoC.
- PWM pins on the Meson.
- do not map unusable IRQs (taken by BIOS) on the Intel Cherryview.
- add GPIO IRQ wakeup support to the Intel driver so we can wake up
from button pushes.
Deprecation:
- delete the obsolete STiH415/6 SoC support"
* tag 'pinctrl-v4.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits)
pinctrl: qcom: fix masking of pinmux functions
pinctrl: intel: Configure GPIO chip IRQ as wakeup interrupts
pinctrl: cherryview: Convert to use devm_gpiochip_add_data()
pinctrl: cherryview: Do not add all southwest and north GPIOs to IRQ domain
gpiolib: Make it possible to exclude GPIOs from IRQ domain
pinctrl: nomadik: don't default-flag IRQs as falling
pinctrl: st: Remove obsolete platforms from pinctrl-st dt doc
pinctrl: st: Remove STiH415/6 SoC pinctrl driver support.
pinctrl: amlogic: gxbb: add i2c pins
pinctrl: amlogic: gxbb: add nand pins
pinctrl: stm32: add IRQ_DOMAIN_HIERARCHY dependency
pinctrl: amlogic: gxbb: add spi nor pins
pinctrl: sh-pfc: r8a7794: Implement voltage switching for SDHI
pinctrl: sh-pfc: r8a7791: Implement voltage switching for SDHI
pinctrl: sh-pfc: Add PORT_GP_24 helper macro
pinctrl: Fix "st,syscfg" definition for STM32 pinctrl
driver: base: pinctrl: return error from pinctrl_bind_pins()
pinctrl: meson-gxbb: add the missing SDIO interrupt pin
pinctrl: aspeed: fix regmap error handling
pinctrl: mediatek: constify gpio_chip structures
...
Diffstat (limited to 'Documentation/gpio/driver.txt')
-rw-r--r-- | Documentation/gpio/driver.txt | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/gpio/driver.txt b/Documentation/gpio/driver.txt index 6cb35a78eff4..368d5a294d89 100644 --- a/Documentation/gpio/driver.txt +++ b/Documentation/gpio/driver.txt @@ -262,6 +262,12 @@ symbol: to the container using container_of(). (See Documentation/driver-model/design-patterns.txt) + If there is a need to exclude certain GPIOs from the IRQ domain, one can + set .irq_need_valid_mask of the gpiochip before gpiochip_add_data() is + called. This allocates .irq_valid_mask with as many bits set as there are + GPIOs in the chip. Drivers can exclude GPIOs by clearing bits from this + mask. The mask must be filled in before gpiochip_irqchip_add() is called. + * gpiochip_set_chained_irqchip(): sets up a chained irq handler for a gpio_chip from a parent IRQ and passes the struct gpio_chip* as handler data. (Notice handler data, since the irqchip data is likely used by the |