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author | Jaehoon Chung <jh80.chung@samsung.com> | 2017-02-13 17:26:10 +0900 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2017-02-21 07:48:40 -0600 |
commit | ad8ec41afa98615a4154eee0121bcf8276695327 (patch) | |
tree | e632a4c1dc3b8669026f999ba1f92c036ecd1d19 /Documentation/devicetree | |
parent | 3278478084747c02725ba804d672235f2ba56bbc (diff) | |
download | linux-ad8ec41afa98615a4154eee0121bcf8276695327.tar.bz2 |
Documentation: samsung-phy: Add exynos-pcie-phy binding
Add the exynos-pcie-phy binding for Exynos PCIe PHY. This is for using
generic PHY framework.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r-- | Documentation/devicetree/bindings/phy/samsung-phy.txt | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt index 9872ba8546bd..ab80bfe31cb3 100644 --- a/Documentation/devicetree/bindings/phy/samsung-phy.txt +++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt @@ -191,3 +191,20 @@ Example: usbdrdphy0 = &usb3_phy0; usbdrdphy1 = &usb3_phy1; }; + +Samsung Exynos SoC series PCIe PHY controller +-------------------------------------------------- +Required properties: +- compatible : Should be set to "samsung,exynos5440-pcie-phy" +- #phy-cells : Must be zero +- reg : a register used by phy driver. + - First is for phy register, second is for block register. +- reg-names : Must be set to "phy" and "block". + +Example: + pcie_phy0: pcie-phy@270000 { + #phy-cells = <0>; + compatible = "samsung,exynos5440-pcie-phy"; + reg = <0x270000 0x1000>, <0x271000 0x40>; + reg-names = "phy", "block"; + }; |