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authorMichal Simek <michal.simek@xilinx.com>2021-10-18 08:40:12 +0200
committerRob Herring <robh@kernel.org>2021-10-28 07:27:26 -0500
commit5628d9f1cdb6ba327cd724663137aea487c5c7e2 (patch)
treecce310dd8ad6f8016042a689e2f4fafb0d2611f7 /Documentation/devicetree
parent243dde59a039e099ce3384e5cada95a61ebefa2c (diff)
downloadlinux-5628d9f1cdb6ba327cd724663137aea487c5c7e2.tar.bz2
dt-bindings: display: xilinx: Fix example with psgtr
Commit cea0f76a483d ("dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY") clearly defines #phy-cells as 4. In past 5 cells were used by it never went to upstream. That's why fix example by using only 4 cells instead of 5. Fixes: e7c7970a678d ("dt-bindings: display: xlnx: Add ZynqMP DP subsystem bindings") Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/a291be294dea6e580ad9acd436742a48b7cd00a2.1634539210.git.michal.simek@xilinx.com Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml4
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml b/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml
index d88bd93f4b80..10ec78ca1c65 100644
--- a/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml
+++ b/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml
@@ -160,8 +160,8 @@ examples:
<&xlnx_dpdma 2>,
<&xlnx_dpdma 3>;
- phys = <&psgtr 1 PHY_TYPE_DP 0 3 27000000>,
- <&psgtr 0 PHY_TYPE_DP 1 3 27000000>;
+ phys = <&psgtr 1 PHY_TYPE_DP 0 3>,
+ <&psgtr 0 PHY_TYPE_DP 1 3>;
phy-names = "dp-phy0", "dp-phy1";
};