summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2019-12-02 11:41:35 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2019-12-02 11:41:35 -0800
commit2c97b5ae83dca56718774e7b4bf9640f05d11867 (patch)
tree13488f899e4bc23163882aa8292c99ea394638cb /Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
parent8328dd2f394e48a010383af176bf55ba4be79da0 (diff)
parenta8de1304b7df30e3a14f2a8b9709bb4ff31a0385 (diff)
downloadlinux-2c97b5ae83dca56718774e7b4bf9640f05d11867.tar.bz2
Merge tag 'devicetree-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull Devicetree updates from Rob Herring: - DT schemas for PWM, syscon, power domains, SRAM, syscon-reboot, syscon-poweroff, renesas-irqc, simple-pm-bus, renesas-bsc, pwm-rcar, Renesas tpu, at24 eeprom, rtc-sh, Allwinner PS/2, sharp,ld-d5116z01b panel, Arm SMMU, max77650, Meson CEC, Amlogic canvas and DWC3 glue, Allwinner A10 mUSB and CAN, TI Davinci MDIO, QCom QCS404 interconnect, Unisoc/Spreadtrum SoCs and UART - Convert a bunch of Samsung bindings to DT schema - Convert a bunch of ST stm32 bindings to DT schema - Realtek and Exynos additions to Arm Mali bindings - Fix schema errors in RiscV CPU schema - Various schema fixes from improved meta-schema checks - Improve the handling of 'dma-ranges' and in particular fix DMA mask setup on PCI bridges - Fix a memory leak in add_changeset_property() and DT unit tests. - Several documentation improvements for schema validation - Rework build rules to improve schema validation errors - Color output for dtx_diff * tag 'devicetree-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (138 commits) libfdt: define INT32_MAX and UINT32_MAX in libfdt_env.h dt-bindings: arm: Remove leftover axentia.txt of: unittest: fix memory leak in attach_node_and_children of: overlay: add_changeset_property() memory leak dt-bindings: interrupt-controller: arm,gic-v3: Add missing type to interrupt-partition-* nodes dt-bindings: firmware: ixp4xx: Drop redundant minItems/maxItems dt-bindings: power: Rename back power_domain.txt bindings to fix references dt-bindings: i2c: stm32: Migrate i2c-stm32 documentation to yaml dt-bindings: mtd: Convert stm32 fmc2-nand bindings to json-schema dt-bindings: remoteproc: convert stm32-rproc to json-schema dt-bindings: mailbox: convert stm32-ipcc to json-schema dt-bindings: mfd: Convert stm32 low power timers bindings to json-schema dt-bindings: interrupt-controller: Convert stm32-exti to json-schema dt-bindings: crypto: Convert stm32 HASH bindings to json-schema dt-bindings: rng: Convert stm32 RNG bindings to json-schema dt-bindings: pwm: Convert Samsung PWM bindings to json-schema dt-bindings: pwm: Convert PWM bindings to json-schema dt-bindings: serial: Add a new compatible string for SC9863A dt-bindings: serial: Convert sprd-uart to json-schema dt-bindings: arm: Add bindings for Unisoc SC9863A ...
Diffstat (limited to 'Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml')
-rw-r--r--Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml127
1 files changed, 127 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
new file mode 100644
index 000000000000..4efb77b653ab
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
@@ -0,0 +1,127 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright 2019 BayLibre, SAS
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Amlogic Meson G12A DWC3 USB SoC Controller Glue
+
+maintainers:
+ - Neil Armstrong <narmstrong@baylibre.com>
+
+description: |
+ The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3
+ in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode
+ only.
+
+ A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY.
+
+ One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP.
+
+ The DWC3 Glue controls the PHY routing and power, an interrupt line is
+ connected to the Glue to serve as OTG ID change detection.
+
+properties:
+ compatible:
+ enum:
+ - amlogic,meson-g12a-usb-ctrl
+
+ ranges: true
+
+ "#address-cells":
+ enum: [ 1, 2 ]
+
+ "#size-cells":
+ enum: [ 1, 2 ]
+
+ clocks:
+ minItems: 1
+
+ resets:
+ minItems: 1
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ phy-names:
+ items:
+ - const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used
+ - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
+ - const: usb3-phy0 # USB3 PHY if USB3_0 is used
+
+ phys:
+ minItems: 1
+ maxItems: 3
+
+ dr_mode: true
+
+ power-domains:
+ maxItems: 1
+
+ vbus-supply:
+ description: VBUS power supply when used in OTG switchable mode
+
+patternProperties:
+ "^usb@[0-9a-f]+$":
+ type: object
+
+additionalProperties: false
+
+required:
+ - compatible
+ - "#address-cells"
+ - "#size-cells"
+ - ranges
+ - clocks
+ - resets
+ - reg
+ - interrupts
+ - phy-names
+ - phys
+ - dr_mode
+
+examples:
+ - |
+ usb: usb@ffe09000 {
+ compatible = "amlogic,meson-g12a-usb-ctrl";
+ reg = <0x0 0xffe09000 0x0 0xa0>;
+ interrupts = <16>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ clocks = <&clkc_usb>;
+ resets = <&reset_usb>;
+
+ dr_mode = "otg";
+
+ phys = <&usb2_phy0>, <&usb2_phy1>, <&usb3_phy0>;
+ phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0";
+
+ dwc2: usb@ff400000 {
+ compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
+ reg = <0xff400000 0x40000>;
+ interrupts = <31>;
+ clocks = <&clkc_usb1>;
+ clock-names = "ddr";
+ phys = <&usb2_phy1>;
+ dr_mode = "peripheral";
+ g-rx-fifo-size = <192>;
+ g-np-tx-fifo-size = <128>;
+ g-tx-fifo-size = <128 128 16 16 16>;
+ };
+
+ dwc3: usb@ff500000 {
+ compatible = "snps,dwc3";
+ reg = <0xff500000 0x100000>;
+ interrupts = <30>;
+ dr_mode = "host";
+ snps,dis_u2_susphy_quirk;
+ snps,quirk-frame-length-adjustment;
+ };
+ };
+