Merge tag 'spi-v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi updates from Mark Brown:
 "Lots of stuff going on in the core for SPI this time around, the two
  big changes both being around time in different forms:

   - A rework of delay times from Alexandru Ardelean which makes the
     ways in which they are specified more consistent between drivers so
     that what's available to clients is less dependent on the hardware
     implementation.

   - Support for PTP timestamping of transfers from Vladimir Oltean,
     useful for use with precision clocks with SPI control interfaces.

   - Big cleanups for the Atmel, PXA2xx and Zynq QSPI drivers"

* tag 'spi-v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (119 commits)
  dt-bindings: spi: Convert stm32 QSPI bindings to json-schema
  spi: pic32: Retire dma_request_slave_channel_compat()
  spi: Fix Kconfig indentation
  spi: mediatek: add SPI_CS_HIGH support
  spi: st-ssc4: add missed pm_runtime_disable
  spi: tegra20-slink: add missed clk_unprepare
  spi: tegra20-slink: Use dma_request_chan() directly for channel request
  spi: tegra114: Use dma_request_chan() directly for channel request
  spi: s3c64xx: Use dma_request_chan() directly for channel request
  spi: qup: Use dma_request_chan() directly for channel request
  spi: pl022: Use dma_request_chan() directly for channel request
  spi: imx: Use dma_request_chan() directly for channel request
  spi: fsl-lpspi: Use dma_request_chan() directly for channel request
  spi: atmel: Use dma_request_chan() directly for channel request
  spi: at91-usart: Use dma_request_chan() directly for channel request
  spi: fsl-cpm: Correct the free:ing
  spi: Fix regression to return zero on success instead of positive value
  spi: pxa2xx: Add missed security checks
  spi: nxp-fspi: Use devm API to fix missed unregistration of controller
  spi: omap2-mcspi: Remove redundant checks
  ...

1 files changed, 83 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml
new file mode 100644
index 000000000000..3665a5fe6b7f
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml
@@ -0,0 +1,83 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/st,stm32-qspi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STMicroelectronics STM32 Quad Serial Peripheral Interface (QSPI) bindings
+
+maintainers:
+  - Christophe Kerello <christophe.kerello@st.com>
+  - Patrice Chotard <patrice.chotard@st.com>
+
+allOf:
+  - $ref: "spi-controller.yaml#"
+
+properties:
+  compatible:
+    const: st,stm32f469-qspi
+
+  reg:
+    items:
+      - description: registers
+      - description: memory mapping
+
+  reg-names:
+    items:
+     - const: qspi
+     - const: qspi_mm
+
+  clocks:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  resets:
+    maxItems: 1
+
+  dmas:
+    items:
+      - description: tx DMA channel
+      - description: rx DMA channel
+
+  dma-names:
+    items:
+      - const: tx
+      - const: rx
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - clocks
+  - interrupts
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/clock/stm32mp1-clks.h>
+    #include <dt-bindings/reset/stm32mp1-resets.h>
+    spi@58003000 {
+      compatible = "st,stm32f469-qspi";
+      reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
+      reg-names = "qspi", "qspi_mm";
+      interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
+      dmas = <&mdma1 22 0x10 0x100002 0x0 0x0>,
+             <&mdma1 22 0x10 0x100008 0x0 0x0>;
+      dma-names = "tx", "rx";
+      clocks = <&rcc QSPI_K>;
+      resets = <&rcc QSPI_R>;
+
+      #address-cells = <1>;
+      #size-cells = <0>;
+
+      flash@0 {
+        compatible = "jedec,spi-nor";
+        reg = <0>;
+        spi-rx-bus-width = <4>;
+        spi-max-frequency = <108000000>;
+      };
+    };
+
+...