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author | Linus Torvalds <torvalds@linux-foundation.org> | 2019-12-02 11:41:35 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2019-12-02 11:41:35 -0800 |
commit | 2c97b5ae83dca56718774e7b4bf9640f05d11867 (patch) | |
tree | 13488f899e4bc23163882aa8292c99ea394638cb /Documentation/devicetree/bindings/serial | |
parent | 8328dd2f394e48a010383af176bf55ba4be79da0 (diff) | |
parent | a8de1304b7df30e3a14f2a8b9709bb4ff31a0385 (diff) | |
download | linux-2c97b5ae83dca56718774e7b4bf9640f05d11867.tar.bz2 |
Merge tag 'devicetree-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull Devicetree updates from Rob Herring:
- DT schemas for PWM, syscon, power domains, SRAM, syscon-reboot,
syscon-poweroff, renesas-irqc, simple-pm-bus, renesas-bsc, pwm-rcar,
Renesas tpu, at24 eeprom, rtc-sh, Allwinner PS/2, sharp,ld-d5116z01b
panel, Arm SMMU, max77650, Meson CEC, Amlogic canvas and DWC3 glue,
Allwinner A10 mUSB and CAN, TI Davinci MDIO, QCom QCS404
interconnect, Unisoc/Spreadtrum SoCs and UART
- Convert a bunch of Samsung bindings to DT schema
- Convert a bunch of ST stm32 bindings to DT schema
- Realtek and Exynos additions to Arm Mali bindings
- Fix schema errors in RiscV CPU schema
- Various schema fixes from improved meta-schema checks
- Improve the handling of 'dma-ranges' and in particular fix DMA mask
setup on PCI bridges
- Fix a memory leak in add_changeset_property() and DT unit tests.
- Several documentation improvements for schema validation
- Rework build rules to improve schema validation errors
- Color output for dtx_diff
* tag 'devicetree-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (138 commits)
libfdt: define INT32_MAX and UINT32_MAX in libfdt_env.h
dt-bindings: arm: Remove leftover axentia.txt
of: unittest: fix memory leak in attach_node_and_children
of: overlay: add_changeset_property() memory leak
dt-bindings: interrupt-controller: arm,gic-v3: Add missing type to interrupt-partition-* nodes
dt-bindings: firmware: ixp4xx: Drop redundant minItems/maxItems
dt-bindings: power: Rename back power_domain.txt bindings to fix references
dt-bindings: i2c: stm32: Migrate i2c-stm32 documentation to yaml
dt-bindings: mtd: Convert stm32 fmc2-nand bindings to json-schema
dt-bindings: remoteproc: convert stm32-rproc to json-schema
dt-bindings: mailbox: convert stm32-ipcc to json-schema
dt-bindings: mfd: Convert stm32 low power timers bindings to json-schema
dt-bindings: interrupt-controller: Convert stm32-exti to json-schema
dt-bindings: crypto: Convert stm32 HASH bindings to json-schema
dt-bindings: rng: Convert stm32 RNG bindings to json-schema
dt-bindings: pwm: Convert Samsung PWM bindings to json-schema
dt-bindings: pwm: Convert PWM bindings to json-schema
dt-bindings: serial: Add a new compatible string for SC9863A
dt-bindings: serial: Convert sprd-uart to json-schema
dt-bindings: arm: Add bindings for Unisoc SC9863A
...
Diffstat (limited to 'Documentation/devicetree/bindings/serial')
4 files changed, 190 insertions, 90 deletions
diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.txt b/Documentation/devicetree/bindings/serial/samsung_uart.txt deleted file mode 100644 index e85f37ec33f0..000000000000 --- a/Documentation/devicetree/bindings/serial/samsung_uart.txt +++ /dev/null @@ -1,58 +0,0 @@ -* Samsung's UART Controller - -The Samsung's UART controller is used for interfacing SoC with serial -communicaion devices. - -Required properties: -- compatible: should be one of following: - - "samsung,exynos4210-uart" - Exynos4210 SoC, - - "samsung,s3c2410-uart" - compatible with ports present on S3C2410 SoC, - - "samsung,s3c2412-uart" - compatible with ports present on S3C2412 SoC, - - "samsung,s3c2440-uart" - compatible with ports present on S3C2440 SoC, - - "samsung,s3c6400-uart" - compatible with ports present on S3C6400 SoC, - - "samsung,s5pv210-uart" - compatible with ports present on S5PV210 SoC. - -- reg: base physical address of the controller and length of memory mapped - region. - -- interrupts: a single interrupt signal to SoC interrupt controller, - according to interrupt bindings documentation [1]. - -- clock-names: input names of clocks used by the controller: - - "uart" - controller bus clock, - - "clk_uart_baudN" - Nth baud base clock input (N = 0, 1, ...), - according to SoC User's Manual (only N = 0 is allowedfor SoCs without - internal baud clock mux). -- clocks: phandles and specifiers for all clocks specified in "clock-names" - property, in the same order, according to clock bindings documentation [2]. - -[1] Documentation/devicetree/bindings/interrupt-controller/interrupts.txt -[2] Documentation/devicetree/bindings/clock/clock-bindings.txt - -Optional properties: -- samsung,uart-fifosize: The fifo size supported by the UART channel - -Note: Each Samsung UART should have an alias correctly numbered in the -"aliases" node, according to serialN format, where N is the port number -(non-negative decimal integer) as specified by User's Manual of respective -SoC. - -Example: - aliases { - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; - }; - -Example: - uart1: serial@7f005400 { - compatible = "samsung,s3c6400-uart"; - reg = <0x7f005400 0x100>; - interrupt-parent = <&vic1>; - interrupts = <6>; - clock-names = "uart", "clk_uart_baud2", - "clk_uart_baud3"; - clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>, - <&clocks SCLK_UART>; - samsung,uart-fifosize = <16>; - }; diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.yaml b/Documentation/devicetree/bindings/serial/samsung_uart.yaml new file mode 100644 index 000000000000..9d2ce347875b --- /dev/null +++ b/Documentation/devicetree/bindings/serial/samsung_uart.yaml @@ -0,0 +1,118 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/serial/samsung_uart.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung S3C, S5P and Exynos SoC UART Controller + +maintainers: + - Krzysztof Kozlowski <krzk@kernel.org> + - Greg Kroah-Hartman <gregkh@linuxfoundation.org> + +description: |+ + Each Samsung UART should have an alias correctly numbered in the "aliases" + node, according to serialN format, where N is the port number (non-negative + decimal integer) as specified by User's Manual of respective SoC. + +properties: + compatible: + items: + - enum: + - samsung,s3c2410-uart + - samsung,s3c2412-uart + - samsung,s3c2440-uart + - samsung,s3c6400-uart + - samsung,s5pv210-uart + - samsung,exynos4210-uart + + reg: + maxItems: 1 + + clocks: + minItems: 2 + maxItems: 5 + + clock-names: + description: N = 0 is allowed for SoCs without internal baud clock mux. + minItems: 2 + maxItems: 5 + items: + - const: uart + - pattern: '^clk_uart_baud[0-3]$' + - pattern: '^clk_uart_baud[0-3]$' + - pattern: '^clk_uart_baud[0-3]$' + - pattern: '^clk_uart_baud[0-3]$' + + interrupts: + description: RX interrupt and optionally TX interrupt. + minItems: 1 + maxItems: 2 + + samsung,uart-fifosize: + description: The fifo size supported by the UART channel. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [16, 64, 256] + +required: + - compatible + - clocks + - clock-names + - interrupts + - reg + +allOf: + - if: + properties: + compatible: + contains: + enum: + - samsung,s3c2410-uart + - samsung,s5pv210-uart + then: + properties: + clocks: + minItems: 2 + maxItems: 3 + clock-names: + minItems: 2 + maxItems: 3 + items: + - const: uart + - pattern: '^clk_uart_baud[0-1]$' + - pattern: '^clk_uart_baud[0-1]$' + + - if: + properties: + compatible: + contains: + enum: + - samsung,exynos4210-uart + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + minItems: 2 + maxItems: 2 + items: + - const: uart + - const: clk_uart_baud0 + +examples: + - | + #include <dt-bindings/clock/samsung,s3c64xx-clock.h> + + uart0: serial@7f005000 { + compatible = "samsung,s3c6400-uart"; + reg = <0x7f005000 0x100>; + interrupt-parent = <&vic1>; + interrupts = <5>; + clock-names = "uart", "clk_uart_baud2", + "clk_uart_baud3"; + clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>, + <&clocks SCLK_UART>; + samsung,uart-fifosize = <16>; + }; diff --git a/Documentation/devicetree/bindings/serial/sprd-uart.txt b/Documentation/devicetree/bindings/serial/sprd-uart.txt deleted file mode 100644 index 9607dc616205..000000000000 --- a/Documentation/devicetree/bindings/serial/sprd-uart.txt +++ /dev/null @@ -1,32 +0,0 @@ -* Spreadtrum serial UART - -Required properties: -- compatible: must be one of: - * "sprd,sc9836-uart" - * "sprd,sc9860-uart", "sprd,sc9836-uart" - -- reg: offset and length of the register set for the device -- interrupts: exactly one interrupt specifier -- clock-names: Should contain following entries: - "enable" for UART module enable clock, - "uart" for UART clock, - "source" for UART source (parent) clock. -- clocks: Should contain a clock specifier for each entry in clock-names. - UART clock and source clock are optional properties, but enable clock - is required. - -Optional properties: -- dma-names: Should contain "rx" for receive and "tx" for transmit channels. -- dmas: A list of dma specifiers, one for each entry in dma-names. - -Example: - uart0: serial@0 { - compatible = "sprd,sc9860-uart", - "sprd,sc9836-uart"; - reg = <0x0 0x100>; - interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; - dma-names = "rx", "tx"; - dmas = <&ap_dma 19>, <&ap_dma 20>; - clock-names = "enable", "uart", "source"; - clocks = <&clk_ap_apb_gates 9>, <&clk_uart0>, <&ext_26m>; - }; diff --git a/Documentation/devicetree/bindings/serial/sprd-uart.yaml b/Documentation/devicetree/bindings/serial/sprd-uart.yaml new file mode 100644 index 000000000000..e66b2e92a7fc --- /dev/null +++ b/Documentation/devicetree/bindings/serial/sprd-uart.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2019 Unisoc Inc. +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/serial/sprd-uart.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Spreadtrum serial UART + +maintainers: + - Orson Zhai <orsonzhai@gmail.com> + - Baolin Wang <baolin.wang7@gmail.com> + - Chunyan Zhang <zhang.lyra@gmail.com> + +properties: + compatible: + oneOf: + - items: + - enum: + - sprd,sc9860-uart + - sprd,sc9863a-uart + - const: sprd,sc9836-uart + - const: sprd,sc9836-uart + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 3 + + clock-names: + description: | + "enable" for UART module enable clock, "uart" for UART clock, "source" + for UART source (parent) clock. + items: + - const: enable + - const: uart + - const: source + + dmas: + minItems: 1 + maxItems: 2 + + dma-names: + minItems: 1 + items: + - const: rx + - const: tx + +required: + - compatible + - reg + - interrupts + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + serial@0 { + compatible = "sprd,sc9860-uart", "sprd,sc9836-uart"; + reg = <0x0 0x100>; + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; + dma-names = "rx", "tx"; + dmas = <&ap_dma 19>, <&ap_dma 20>; + clock-names = "enable", "uart", "source"; + clocks = <&clk_ap_apb_gates 9>, <&clk_uart0>, <&ext_26m>; + }; + +... |