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author | Arnd Bergmann <arnd@arndb.de> | 2019-09-03 16:03:47 +0200 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2019-09-03 16:03:48 +0200 |
commit | 0c89d4dab3a574ddbda2bf84671cdc3e975a2a8d (patch) | |
tree | d30eacd69994adefe5b8875e69acae2179baccd6 /Documentation/devicetree/bindings/serial | |
parent | 48dd4cf01f90d513851197f0dd2c60da19a3809c (diff) | |
parent | 8d5fc0b95fd1542c575ac64457bd17d74a206497 (diff) | |
download | linux-0c89d4dab3a574ddbda2bf84671cdc3e975a2a8d.tar.bz2 |
Merge tag 'imx-bindings-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX DT bindings update for 5.4
- Add SoC bindings for i.MX8MN.
- Add board bindings for pico-pi-imx8m, Hummingboard Pulse, imx8mq
nitrogen, i.MX8QXP AI_ML, ls1046a-frwy etc.
- Add vendor prefix for Anvo-Systems and Einfochips.
- Update LPUART bindings for i.MX8QXP clock requirement.
- Update imx-weim bindings for optional burst clock mode support.
- Update EEPROM bindings for Anvo ANV32E61W device support.
* tag 'imx-bindings-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: arm: fsl: Add Kontron i.MX6UL N6310 compatibles
dt-bindings: eeprom: at25: Add Anvo ANV32E61W
dt-bindings: vendor-prefixes: Add Anvo-Systems
dt-bindings: arm: fsl: add Hummingboard Pulse
dt-bindings: arm: imx: add imx8mq nitrogen support
dt-bindings: fsl: dspi: Add fsl,ls1088a-dspi compatible string
dt-bindings: arm: imx: Add the soc binding for i.MX8MN
dt-bindings: bus: imx-weim: document optional burst clock mode
dt-bindings: arm: fsl: Add the pico-pi-imx8m board
dt-bindings: arm: Document i.MX8QXP AI_ML board binding
dt-bindings: Add Vendor prefix for Einfochips
dt-bindings: arm: nxp: Add device tree binding for ls1046a-frwy board
dt-bindings: serial: lpuart: add the clock requirement for imx8qxp
dt-bindings: arm: fsl: Add support for ZII i.MX7 RMU2 board
Link: https://lore.kernel.org/r/20190825153237.28829-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'Documentation/devicetree/bindings/serial')
-rw-r--r-- | Documentation/devicetree/bindings/serial/fsl-lpuart.txt | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/serial/fsl-lpuart.txt b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt index 21483ba820bc..3495eee81d53 100644 --- a/Documentation/devicetree/bindings/serial/fsl-lpuart.txt +++ b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt @@ -13,7 +13,10 @@ Required properties: - reg : Address and length of the register set for the device - interrupts : Should contain uart interrupt - clocks : phandle + clock specifier pairs, one for each entry in clock-names -- clock-names : should contain: "ipg" - the uart clock +- clock-names : For vf610/ls1021a/imx7ulp, "ipg" clock is for uart bus/baud + clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used to access + lpuart controller registers, it also requires "baud" clock for module to + receive/transmit data. Optional properties: - dmas: A list of two dma specifiers, one for each entry in dma-names. |