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| author | Pi-Hsun Shih <pihsun@chromium.org> | 2019-06-03 11:45:10 +0800 |
|---|---|---|
| committer | Lee Jones <lee.jones@linaro.org> | 2019-07-02 12:11:31 +0100 |
| commit | c77cd342f9fd64a9f6ed3eb270fd527826ef92d3 (patch) | |
| tree | 896332e2cdfecf117658185997fe90e1eb5dc01f /Documentation/devicetree/bindings/mfd/cros-ec.txt | |
| parent | 297939901f382f16ab78a8073cdfb2a6279bb654 (diff) | |
| download | linux-c77cd342f9fd64a9f6ed3eb270fd527826ef92d3.tar.bz2 | |
dt-bindings: Add binding for cros-ec-rpmsg
Add a DT binding documentation for ChromeOS EC driver over rpmsg.
Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/mfd/cros-ec.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/mfd/cros-ec.txt | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.txt b/Documentation/devicetree/bindings/mfd/cros-ec.txt index 6245c9b1a68b..4860eabd0f72 100644 --- a/Documentation/devicetree/bindings/mfd/cros-ec.txt +++ b/Documentation/devicetree/bindings/mfd/cros-ec.txt @@ -3,7 +3,7 @@ ChromeOS Embedded Controller Google's ChromeOS EC is a Cortex-M device which talks to the AP and implements various function such as keyboard and battery charging. -The EC can be connect through various means (I2C, SPI, LPC) and the +The EC can be connect through various means (I2C, SPI, LPC, RPMSG) and the compatible string used depends on the interface. Each connection method has its own driver which connects to the top level interface-agnostic EC driver. Other Linux driver (such as cros-ec-keyb for the matrix keyboard) connect to @@ -17,6 +17,9 @@ Required properties (SPI): - compatible: "google,cros-ec-spi" - reg: SPI chip select +Required properties (RPMSG): +- compatible: "google,cros-ec-rpmsg" + Optional properties (SPI): - google,cros-ec-spi-pre-delay: Some implementations of the EC need a little time to wake up from sleep before they can receive SPI transfers at a high |