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authorThomas Gleixner <tglx@linutronix.de>2018-05-29 17:50:22 +0200
committerThomas Gleixner <tglx@linutronix.de>2018-06-21 14:20:57 +0200
commit6a4d2657e048f096c7ffcad254010bd94891c8c0 (patch)
tree20d72fc0fdc2d6a5903ed7f0681dbc50e5c93d66 /Documentation/cpu-freq
parentba2591a5993eabcc8e874e30f361d8ffbb10d6d4 (diff)
downloadlinux-6a4d2657e048f096c7ffcad254010bd94891c8c0.tar.bz2
x86/smp: Provide topology_is_primary_thread()
If the CPU is supporting SMT then the primary thread can be found by checking the lower APIC ID bits for zero. smp_num_siblings is used to build the mask for the APIC ID bits which need to be taken into account. This uses the MPTABLE or ACPI/MADT supplied APIC ID, which can be different than the initial APIC ID in CPUID. But according to AMD the lower bits have to be consistent. Intel gave a tentative confirmation as well. Preparatory patch to support disabling SMT at boot/runtime. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Acked-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'Documentation/cpu-freq')
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