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| author | Sebastian Reichel <sre@kernel.org> | 2018-04-26 12:18:30 +0200 |
|---|---|---|
| committer | Sebastian Reichel <sre@kernel.org> | 2018-04-26 12:18:30 +0200 |
| commit | 1f140ff467081212562327da6561edb6b3b3ed10 (patch) | |
| tree | da65d766f3501c3366bd12c2856b15af28fd60e9 /Documentation/ABI/testing/sysfs-bus-usb | |
| parent | a78c0c30ec73e90d1b5d8b06f593091d9b9f76d3 (diff) | |
| parent | 0c718676ab3f02e98e85e7049e03d2879c62cb10 (diff) | |
| download | linux-1f140ff467081212562327da6561edb6b3b3ed10.tar.bz2 | |
Merge tag 'tags/tcpm-pps-4.18' into psy-next
Tag/Merge point for adding typeC power supply support
This is a signed tag/merge point to handle the cross-tree merge of the
USB and power supply subsystems for the patch series:
Subject: [PATCH v8 0/6] typec: tcpm: Add sink side support for PPS
It is based on the usb.git tree, in the usb-next branch, for merging in
4.18-rc1.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Diffstat (limited to 'Documentation/ABI/testing/sysfs-bus-usb')
| -rw-r--r-- | Documentation/ABI/testing/sysfs-bus-usb | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/Documentation/ABI/testing/sysfs-bus-usb b/Documentation/ABI/testing/sysfs-bus-usb index c702c78f24d8..c6e9b30f05b1 100644 --- a/Documentation/ABI/testing/sysfs-bus-usb +++ b/Documentation/ABI/testing/sysfs-bus-usb @@ -236,3 +236,21 @@ Description: Supported values are 0 - 15. More information on how besl values map to microseconds can be found in USB 2.0 ECN Errata for Link Power Management, section 4.10) + +What: /sys/bus/usb/devices/.../rx_lanes +Date: March 2018 +Contact: Mathias Nyman <mathias.nyman@linux.intel.com> +Description: + Number of rx lanes the device is using. + USB 3.2 adds Dual-lane support, 2 rx and 2 tx lanes over Type-C. + Inter-Chip SSIC devices support asymmetric lanes up to 4 lanes per + direction. Devices before USB 3.2 are single lane (rx_lanes = 1) + +What: /sys/bus/usb/devices/.../tx_lanes +Date: March 2018 +Contact: Mathias Nyman <mathias.nyman@linux.intel.com> +Description: + Number of tx lanes the device is using. + USB 3.2 adds Dual-lane support, 2 rx and 2 tx -lanes over Type-C. + Inter-Chip SSIC devices support asymmetric lanes up to 4 lanes per + direction. Devices before USB 3.2 are single lane (tx_lanes = 1) |