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| author | Michael Chan <michael.chan@broadcom.com> | 2018-12-09 07:01:00 -0500 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2018-12-09 11:46:58 -0800 |
| commit | 75720e6323a1d195ae3ebf1a7b5e17c2e687f552 (patch) | |
| tree | 6eda592fd7ef4cc038c0902364de571b7abf9342 /COPYING | |
| parent | 804fba4e9f508c8004a4bfbdf3f300ca237c56df (diff) | |
| download | linux-75720e6323a1d195ae3ebf1a7b5e17c2e687f552.tar.bz2 | |
bnxt_en: Keep track of reserved IRQs.
The new 57500 chips use 1 NQ per MSIX vector, whereas legacy chips use
1 CP ring per MSIX vector. To better unify this, add a resv_irqs
field to struct bnxt_hw_resc. On legacy chips, we initialize resv_irqs
with resv_cp_rings. On new chips, we initialize it with the allocated
MSIX resources.
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'COPYING')
0 files changed, 0 insertions, 0 deletions