diff options
author | Peter Zijlstra <peterz@infradead.org> | 2020-01-31 13:45:34 +0100 |
---|---|---|
committer | Geert Uytterhoeven <geert@linux-m68k.org> | 2020-02-10 10:57:48 +0100 |
commit | 13076a29d52e91d29ab6b13e7279c9eacd0b6dbb (patch) | |
tree | 0f570e991c449c46f76d9868e3c79c4a38912967 | |
parent | fd1aa6303c4d6f3c1489eadc5cc37e581c3b41ea (diff) | |
download | linux-13076a29d52e91d29ab6b13e7279c9eacd0b6dbb.tar.bz2 |
m68k: mm: Unify Motorola MMU page setup
Seeing how there are 5 copies of this magic code, one of which is
unexplainably different, unify and document things.
Suggested-by: Will Deacon <will@kernel.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Greg Ungerer <gerg@linux-m68k.org>
Tested-by: Michael Schmitz <schmitzmic@gmail.com>
Tested-by: Greg Ungerer <gerg@linux-m68k.org>
Link: https://lore.kernel.org/r/20200131125403.597688427@infradead.org
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
-rw-r--r-- | arch/m68k/include/asm/motorola_pgalloc.h | 23 | ||||
-rw-r--r-- | arch/m68k/mm/memory.c | 5 | ||||
-rw-r--r-- | arch/m68k/mm/motorola.c | 30 |
3 files changed, 36 insertions, 22 deletions
diff --git a/arch/m68k/include/asm/motorola_pgalloc.h b/arch/m68k/include/asm/motorola_pgalloc.h index ff9cc401ffd1..85af0c602e9f 100644 --- a/arch/m68k/include/asm/motorola_pgalloc.h +++ b/arch/m68k/include/asm/motorola_pgalloc.h @@ -5,6 +5,9 @@ #include <asm/tlb.h> #include <asm/tlbflush.h> +extern void mmu_page_ctor(void *page); +extern void mmu_page_dtor(void *page); + extern pmd_t *get_pointer_table(void); extern int free_pointer_table(pmd_t *); @@ -13,25 +16,21 @@ static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm) pte_t *pte; pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO); - if (pte) { - __flush_page_to_ram(pte); - flush_tlb_kernel_page(pte); - nocache_page(pte); - } + if (pte) + mmu_page_ctor(pte); return pte; } static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) { - cache_page(pte); + mmu_page_dtor(pte); free_page((unsigned long) pte); } static inline pgtable_t pte_alloc_one(struct mm_struct *mm) { struct page *page; - pte_t *pte; page = alloc_pages(GFP_KERNEL|__GFP_ZERO, 0); if(!page) @@ -41,18 +40,16 @@ static inline pgtable_t pte_alloc_one(struct mm_struct *mm) return NULL; } - pte = kmap(page); - __flush_page_to_ram(pte); - flush_tlb_kernel_page(pte); - nocache_page(pte); + mmu_page_ctor(kmap(page)); kunmap(page); + return page; } static inline void pte_free(struct mm_struct *mm, pgtable_t page) { pgtable_pte_page_dtor(page); - cache_page(kmap(page)); + mmu_page_dtor(kmap(page)); kunmap(page); __free_page(page); } @@ -61,7 +58,7 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t page, unsigned long address) { pgtable_pte_page_dtor(page); - cache_page(kmap(page)); + mmu_page_dtor(kmap(page)); kunmap(page); __free_page(page); } diff --git a/arch/m68k/mm/memory.c b/arch/m68k/mm/memory.c index 227c04fe60d2..36683f2a28d0 100644 --- a/arch/m68k/mm/memory.c +++ b/arch/m68k/mm/memory.c @@ -77,8 +77,7 @@ pmd_t *get_pointer_table (void) if (!(page = (void *)get_zeroed_page(GFP_KERNEL))) return NULL; - flush_tlb_kernel_page(page); - nocache_page(page); + mmu_page_ctor(page); new = PD_PTABLE(page); PD_MARKBITS(new) = 0xfe; @@ -112,7 +111,7 @@ int free_pointer_table (pmd_t *ptable) if (PD_MARKBITS(dp) == 0xff) { /* all tables in page are free, free page */ list_del(dp); - cache_page((void *)page); + mmu_page_dtor((void *)page); free_page (page); return 1; } else if (ptable_list.next != dp) { diff --git a/arch/m68k/mm/motorola.c b/arch/m68k/mm/motorola.c index 4857985b8080..be61f35a7432 100644 --- a/arch/m68k/mm/motorola.c +++ b/arch/m68k/mm/motorola.c @@ -45,6 +45,28 @@ unsigned long mm_cachebits; EXPORT_SYMBOL(mm_cachebits); #endif + +/* + * Motorola 680x0 user's manual recommends using uncached memory for address + * translation tables. + * + * Seeing how the MMU can be external on (some of) these chips, that seems like + * a very important recommendation to follow. Provide some helpers to combat + * 'variation' amongst the users of this. + */ + +void mmu_page_ctor(void *page) +{ + __flush_page_to_ram(page); + flush_tlb_kernel_page(page); + nocache_page(page); +} + +void mmu_page_dtor(void *page) +{ + cache_page(page); +} + /* size of memory already mapped in head.S */ extern __initdata unsigned long m68k_init_mapped_size; @@ -60,9 +82,7 @@ static pte_t * __init kernel_page_table(void) __func__, PAGE_SIZE, PAGE_SIZE); clear_page(ptablep); - __flush_page_to_ram(ptablep); - flush_tlb_kernel_page(ptablep); - nocache_page(ptablep); + mmu_page_ctor(ptablep); return ptablep; } @@ -106,9 +126,7 @@ static pmd_t * __init kernel_ptr_table(void) __func__, PAGE_SIZE, PAGE_SIZE); clear_page(last_pgtable); - __flush_page_to_ram(last_pgtable); - flush_tlb_kernel_page(last_pgtable); - nocache_page(last_pgtable); + mmu_page_ctor(last_pgtable); } return last_pgtable; |