diff options
| author | Olof Johansson <olof@lixom.net> | 2007-11-28 20:57:09 -0600 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2008-01-28 15:04:24 -0800 |
| commit | 906674abab0424b466a2db4bb6a890a8c477b10a (patch) | |
| tree | 967cf65374d0fe39e4c8b83ddb6f68479bf30d50 | |
| parent | 61cec3bddc79373a246e2f8eb13e5acdc106f46a (diff) | |
| download | linux-906674abab0424b466a2db4bb6a890a8c477b10a.tar.bz2 | |
pasemi_mac: Improve RX interrupt mitigation
pasemi_mac: Improve RX interrupt mitigation
Currently the receive side interrupts will go off on the reception of
a packet, NAPI will poll the ring and keep polling as long as there's
a decent amount of packets to receive.
This is less than optimal, especially for LRO where it's better if we
have a more substantial amount of packets to process at once, to get
the real LRO benefits.
So, set the count threshold to a higher value and use the timeout feature
that will give us an interrupt even if not enough packets have come in
to set off the count threshold.
FIXME: It'd be real nice to have ethtool support for users to tune this
at runtime.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
| -rw-r--r-- | drivers/net/pasemi_mac.c | 18 |
1 files changed, 10 insertions, 8 deletions
diff --git a/drivers/net/pasemi_mac.c b/drivers/net/pasemi_mac.c index 683e8de0ac89..e78aac488f3c 100644 --- a/drivers/net/pasemi_mac.c +++ b/drivers/net/pasemi_mac.c @@ -504,15 +504,19 @@ static void pasemi_mac_replenish_rx_ring(const struct net_device *dev, static void pasemi_mac_restart_rx_intr(const struct pasemi_mac *mac) { + struct pasemi_mac_rxring *rx = rx_ring(mac); unsigned int reg, pcnt; /* Re-enable packet count interrupts: finally * ack the packet count interrupt we got in rx_intr. */ - pcnt = *rx_ring(mac)->chan.status & PAS_STATUS_PCNT_M; + pcnt = *rx->chan.status & PAS_STATUS_PCNT_M; reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC; + if (*rx->chan.status & PAS_STATUS_TIMER) + reg |= PAS_IOB_DMA_RXCH_RESET_TINTC; + write_iob_reg(PAS_IOB_DMA_RXCH_RESET(mac->rx->chan.chno), reg); } @@ -795,8 +799,6 @@ static irqreturn_t pasemi_mac_rx_intr(int irq, void *data) reg |= PAS_IOB_DMA_RXCH_RESET_SINTC; if (*chan->status & PAS_STATUS_ERROR) reg |= PAS_IOB_DMA_RXCH_RESET_DINTC; - if (*chan->status & PAS_STATUS_TIMER) - reg |= PAS_IOB_DMA_RXCH_RESET_TINTC; netif_rx_schedule(dev, &mac->napi); @@ -972,10 +974,6 @@ static int pasemi_mac_open(struct net_device *dev) write_mac_reg(mac, PAS_MAC_CFG_TXP, flags); - /* 0xffffff is max value, about 16ms */ - write_iob_reg(PAS_IOB_DMA_COM_TIMEOUTCFG, - PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0xffffff)); - ret = pasemi_mac_setup_rx_resources(dev); if (ret) goto out_rx_resources; @@ -985,8 +983,12 @@ static int pasemi_mac_open(struct net_device *dev) if (!mac->tx) goto out_tx_ring; + /* 0x3ff with 33MHz clock is about 31us */ + write_iob_reg(PAS_IOB_DMA_COM_TIMEOUTCFG, + PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0x3ff)); + write_iob_reg(PAS_IOB_DMA_RXCH_CFG(mac->rx->chan.chno), - PAS_IOB_DMA_RXCH_CFG_CNTTH(0)); + PAS_IOB_DMA_RXCH_CFG_CNTTH(128)); write_iob_reg(PAS_IOB_DMA_TXCH_CFG(mac->tx->chan.chno), PAS_IOB_DMA_TXCH_CFG_CNTTH(32)); |