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author | Jungseung Lee <js07.lee@samsung.com> | 2020-03-18 21:06:15 +0900 |
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committer | Tudor Ambarus <tudor.ambarus@microchip.com> | 2020-03-24 11:47:52 +0200 |
commit | f3f2b7eb2f1c5889b0a7162b6b5a69c0f357befd (patch) | |
tree | 28b507aa55740b63c6ba90cb69eee92cf886cfb2 | |
parent | 05635c14a292de0e1a221dc31c04aba3913f03c8 (diff) | |
download | linux-f3f2b7eb2f1c5889b0a7162b6b5a69c0f357befd.tar.bz2 |
mtd: spi-nor: Enable locking for n25q512ax3/n25q512a
n25q512ax3 and n25q512a use the 4 bit Block Protection scheme.
Enable locking for both. Tested on n25q512ax3. The other is modified
following the datasheet.
Signed-off-by: Jungseung Lee <js07.lee@samsung.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
-rw-r--r-- | drivers/mtd/spi-nor/micron-st.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c index 3874a62d8b47..6c034b9718e2 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -47,12 +47,16 @@ static const struct flash_info st_parts[] = { SECT_4K | USE_FSR | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024, - SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, + SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | + SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6) }, { "mt25qu512a", INFO6(0x20bb20, 0x104400, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { "n25q512a", INFO(0x20bb20, 0, 64 * 1024, 1024, - SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, + SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | + SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6) }, { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, |