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| author | Pingchao Yang <pingchao.yang@intel.com> | 2015-12-16 10:39:40 +0800 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2015-12-22 20:43:31 +0800 |
| commit | 46621e6f84908bb9df494d5fc2bcd145041810d5 (patch) | |
| tree | 1ed791b1e42dec4faa74cd5ef1db83ff5afa98ba | |
| parent | 5319216dcfee14886abb2b7090e8fcf2e2d8a611 (diff) | |
| download | linux-46621e6f84908bb9df494d5fc2bcd145041810d5.tar.bz2 | |
crypto: qat - fix CTX_ENABLES bits shift direction issue
AE CTX bits should be 8-15 in CTX_ENABLES, so the mask
value 0xff should be left shifted 0x8.
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Yang Pingchao <pingchao.yang@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| -rw-r--r-- | drivers/crypto/qat/qat_common/qat_hal.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/crypto/qat/qat_common/qat_hal.c b/drivers/crypto/qat/qat_common/qat_hal.c index 45c173947d1b..81bd1fed4eee 100644 --- a/drivers/crypto/qat/qat_common/qat_hal.c +++ b/drivers/crypto/qat/qat_common/qat_hal.c @@ -418,7 +418,7 @@ int qat_hal_check_ae_active(struct icp_qat_fw_loader_handle *handle, qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES, &enable); qat_hal_rd_ae_csr(handle, ae, ACTIVE_CTX_STATUS, &active); - if ((enable & (0xff >> CE_ENABLE_BITPOS)) || + if ((enable & (0xff << CE_ENABLE_BITPOS)) || (active & (1 << ACS_ABO_BITPOS))) return 1; else |