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authorThor Thayer <tthayer@opensource.altera.com>2016-10-10 09:25:24 -0500
committerMark Brown <broonie@kernel.org>2016-10-21 12:09:30 +0100
commit8eee6b9dd30d5b20a4c31886057a68bb6a2736c9 (patch)
tree8d10e86d7f5575015b7316619369d75a70b831a6
parent1001354ca34179f3db924eb66672442a173147dc (diff)
downloadlinux-8eee6b9dd30d5b20a4c31886057a68bb6a2736c9.tar.bz2
spi: Add Flag to Enable Slave Select with GPIO Chip Select.
Some SPI masters require slave selection before the transfer can begin [1]. The SPI framework currently selects the chip using either 1) the internal CS mechanism or 2) the GPIO CS, but not both. This patch adds a new master->flags define to indicate both the GPIO CS and the internal chip select mechanism should be used. Tested On: Altera CycloneV development kit Compile tested for build errors on x86_64 (allyesconfigs) [1] DesignWare dw_apb_ssi Databook, Version 3.20a (page 39) Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--drivers/spi/spi.c9
-rw-r--r--include/linux/spi/spi.h1
2 files changed, 8 insertions, 2 deletions
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 5787b723b593..cbe15ab5f8a8 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -697,10 +697,15 @@ static void spi_set_cs(struct spi_device *spi, bool enable)
if (spi->mode & SPI_CS_HIGH)
enable = !enable;
- if (gpio_is_valid(spi->cs_gpio))
+ if (gpio_is_valid(spi->cs_gpio)) {
gpio_set_value(spi->cs_gpio, !enable);
- else if (spi->master->set_cs)
+ /* Some SPI masters need both GPIO CS & slave_select */
+ if ((spi->master->flags & SPI_MASTER_GPIO_SS) &&
+ spi->master->set_cs)
+ spi->master->set_cs(spi, !enable);
+ } else if (spi->master->set_cs) {
spi->master->set_cs(spi, !enable);
+ }
}
#ifdef CONFIG_HAS_DMA
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 4b743ac35396..75c6bd0ac605 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -442,6 +442,7 @@ struct spi_master {
#define SPI_MASTER_NO_TX BIT(2) /* can't do buffer write */
#define SPI_MASTER_MUST_RX BIT(3) /* requires rx */
#define SPI_MASTER_MUST_TX BIT(4) /* requires tx */
+#define SPI_MASTER_GPIO_SS BIT(5) /* GPIO CS must select slave */
/*
* on some hardware transfer / message size may be constrained