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authorBjorn Helgaas <bhelgaas@google.com>2018-03-13 15:03:36 -0500
committerBjorn Helgaas <bhelgaas@google.com>2018-03-13 15:03:36 -0500
commit5a1e0baa34fdf458a42e5ff99e3b04d909ba99ea (patch)
treeee08a21c2bcd2b339b9a9e82c23dd90e32f71906
parent7928b2cbe55b2a410a0f5c1f154610059c57b1b2 (diff)
downloadlinux-5a1e0baa34fdf458a42e5ff99e3b04d909ba99ea.tar.bz2
PCI/MSI: Don't set up INTx if MSI or MSI-X is enabled
If MSI or MSI-X is enabled, the device uses that. It uses INTx only if both MSI and MSI-X are disabled (see PCIe r4.0, sec 7.7.1.2), so if a device already has MSI or MSI-X enabled, there's no need to set up its legacy INTx interrupt. bba6f6fc68e7 ("[PATCH] MSI-X: fix resume crash") changed the cris, frv, x86, and ia64 arches to skip INTx setup when MSI is enabled. The cris and frv arches have since been removed. 16cf0ebc35dd ("x86/PCI: Do not use interrupt links for devices using MSI-X") extended that by changing x86 to also skip INTx setup when MSI-X is enabled. Change ia64 to skip INTx setup when either MSI or MSI-X is enabled by applying the logic from 16cf0ebc35dd to ia64 as well as x86. Tested-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
-rw-r--r--arch/ia64/pci/pci.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index f5ec736100ee..7ccc64d5fe3e 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -398,7 +398,7 @@ pcibios_enable_device (struct pci_dev *dev, int mask)
if (ret < 0)
return ret;
- if (!dev->msi_enabled)
+ if (!pci_dev_msi_enabled(dev))
return acpi_pci_irq_enable(dev);
return 0;
}
@@ -407,7 +407,7 @@ void
pcibios_disable_device (struct pci_dev *dev)
{
BUG_ON(atomic_read(&dev->enable_cnt));
- if (!dev->msi_enabled)
+ if (!pci_dev_msi_enabled(dev))
acpi_pci_irq_disable(dev);
}