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authorGeert Uytterhoeven <geert+renesas@glider.be>2015-03-18 19:56:01 +0100
committerSimon Horman <horms+renesas@verge.net.au>2015-05-11 15:01:23 +0900
commit1c5ca5db11edd7ff27ad8a98ffb2ac61bfd520b6 (patch)
tree5616cd6a401bf0f011b392264c213b55248c4049
parent62d386c04b1cb9df430c955b309406175d26b6b3 (diff)
downloadlinux-1c5ca5db11edd7ff27ad8a98ffb2ac61bfd520b6.tar.bz2
ARM: shmobile: r8a7794: Add IRQC clock to device tree
Link the external IRQ controller irqc0 to the IRQC module clock, so it can be power managed using that clock. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/boot/dts/r8a7794.dtsi9
-rw-r--r--include/dt-bindings/clock/r8a7794-clock.h3
2 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 7a3ffa51a8bf..01cf54f70501 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -105,6 +105,7 @@
<0 15 IRQ_TYPE_LEVEL_HIGH>,
<0 16 IRQ_TYPE_LEVEL_HIGH>,
<0 17 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp4_clks R8A7794_CLK_IRQC>;
};
dmac0: dma-controller@e6700000 {
@@ -625,6 +626,14 @@
"sdhi2", "sdhi1", "sdhi0",
"mmcif0", "cmt1", "usbdmac0", "usbdmac1";
};
+ mstp4_clks: mstp4_clks@e6150140 {
+ compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
+ reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
+ clocks = <&cp_clk>;
+ #clock-cells = <1>;
+ clock-indices = <R8A7794_CLK_IRQC>;
+ clock-output-names = "irqc";
+ };
mstp7_clks: mstp7_clks@e615014c {
compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h
index d63323032d6e..09da38a58776 100644
--- a/include/dt-bindings/clock/r8a7794-clock.h
+++ b/include/dt-bindings/clock/r8a7794-clock.h
@@ -60,6 +60,9 @@
#define R8A7794_CLK_USBDMAC0 30
#define R8A7794_CLK_USBDMAC1 31
+/* MSTP4 */
+#define R8A7794_CLK_IRQC 7
+
/* MSTP5 */
#define R8A7794_CLK_THERMAL 22
#define R8A7794_CLK_PWM 23