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| author | Krzysztof Kozlowski <k.kozlowski@samsung.com> | 2015-05-02 14:40:08 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene@kernel.org> | 2015-05-17 10:51:59 +0900 |
| commit | ce9940a9a4aec5f1cec2ba8b8dc8a9bbbabd54fe (patch) | |
| tree | 4ce39af7ae426032194aef96bb69d8724cf8f10f | |
| parent | c5abf61999e337f166ee8382c11d9542514d772d (diff) | |
| download | linux-ce9940a9a4aec5f1cec2ba8b8dc8a9bbbabd54fe.tar.bz2 | |
ARM: dts: Enable S3C RTC on exynos4412-trats2 and exynos5420-arndale-octa
Extend the S3C RTC node with rtc_src clock so it could be operational.
The rtc_src clock is provided by MAX77686 (Trats2) or S2MPS11 (Arndale
Octa).
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
| -rw-r--r-- | arch/arm/boot/dts/exynos4.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/exynos4412-trats2.dts | 9 | ||||
| -rw-r--r-- | arch/arm/boot/dts/exynos5420-arndale-octa.dts | 11 |
3 files changed, 16 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index e20cdc24c3bb..76929d3905e4 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -266,7 +266,7 @@ status = "disabled"; }; - rtc@10070000 { + rtc: rtc@10070000 { compatible = "samsung,s3c6410-rtc"; reg = <0x10070000 0x100>; interrupt-parent = <&pmu_system_controller>; diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 173ffa479ad3..c032cde11d5c 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -16,6 +16,7 @@ #include "exynos4412.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/clock/maxim,max77686.h> / { model = "Samsung Trats 2 based on Exynos4412"; @@ -214,7 +215,7 @@ pinctrl-names = "default"; status = "okay"; - max77686_pmic@09 { + max77686: max77686_pmic@09 { compatible = "maxim,max77686"; interrupt-parent = <&gpx0>; interrupts = <7 0>; @@ -1304,3 +1305,9 @@ PIN_SLP(gpv4-0, INPUT, DOWN); }; }; + +&rtc { + status = "okay"; + clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>; + clock-names = "rtc", "rtc_src"; +}; diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts index 4efcf7c8f609..9924b870423f 100644 --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts @@ -13,6 +13,7 @@ #include "exynos5420.dtsi" #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/input/input.h> +#include <dt-bindings/clock/samsung,s2mps11.h> / { model = "Insignal Arndale Octa evaluation board based on EXYNOS5420"; @@ -38,10 +39,6 @@ }; }; - rtc@101E0000 { - status = "okay"; - }; - codec@11000000 { samsung,mfc-r = <0x43000000 0x800000>; samsung,mfc-l = <0x51000000 0x800000>; @@ -387,3 +384,9 @@ samsung,pin-drv = <0>; }; }; + +&rtc { + status = "okay"; + clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; + clock-names = "rtc", "rtc_src"; +}; |