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authorThomas Gleixner <tglx@linutronix.de>2017-06-30 17:29:46 +0200
committerThomas Gleixner <tglx@linutronix.de>2017-06-30 17:29:46 +0200
commitf9632de40ee0161e864bea8c1b017d957fd7312c (patch)
treece97718b9e1171d284fd1b3daaaefaf9a638733a
parent425a17cbfff933c4cca4eeef5caa5926d198dd85 (diff)
parentca38701935138a4aba7dd9e4daf21e13a4663f43 (diff)
downloadlinux-f9632de40ee0161e864bea8c1b017d957fd7312c.tar.bz2
Merge tag 'irqchip-4.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Merge second batch of irqchip updates for 4.13 from Marc Zyngier - Potential out of bound access for GICv3 - Memory allocation gotcha in the Marvell GICP driver - Fix openrisc interrupt acknowledgement
-rw-r--r--drivers/irqchip/irq-gic-v3.c3
-rw-r--r--drivers/irqchip/irq-mvebu-gicp.c4
-rw-r--r--drivers/irqchip/irq-or1k-pic.c2
3 files changed, 6 insertions, 3 deletions
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index c132f29322cc..dbffb7ab6203 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -645,6 +645,9 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
int enabled;
u64 val;
+ if (cpu >= nr_cpu_ids)
+ return -EINVAL;
+
if (gic_irq_in_rdist(d))
return -EINVAL;
diff --git a/drivers/irqchip/irq-mvebu-gicp.c b/drivers/irqchip/irq-mvebu-gicp.c
index 45358ac9bb1d..b283fc90be1e 100644
--- a/drivers/irqchip/irq-mvebu-gicp.c
+++ b/drivers/irqchip/irq-mvebu-gicp.c
@@ -226,8 +226,8 @@ static int mvebu_gicp_probe(struct platform_device *pdev)
}
gicp->spi_bitmap = devm_kzalloc(&pdev->dev,
- BITS_TO_LONGS(gicp->spi_cnt),
- GFP_KERNEL);
+ BITS_TO_LONGS(gicp->spi_cnt) * sizeof(long),
+ GFP_KERNEL);
if (!gicp->spi_bitmap)
return -ENOMEM;
diff --git a/drivers/irqchip/irq-or1k-pic.c b/drivers/irqchip/irq-or1k-pic.c
index 6a9a3e79218b..dd9d5d12fea2 100644
--- a/drivers/irqchip/irq-or1k-pic.c
+++ b/drivers/irqchip/irq-or1k-pic.c
@@ -70,7 +70,7 @@ static struct or1k_pic_dev or1k_pic_level = {
.name = "or1k-PIC-level",
.irq_unmask = or1k_pic_unmask,
.irq_mask = or1k_pic_mask,
- .irq_mask_ack = or1k_pic_mask,
+ .irq_mask_ack = or1k_pic_mask_ack,
},
.handle = handle_level_irq,
.flags = IRQ_LEVEL | IRQ_NOPROBE,