diff options
| author | Sinan Kaya <okaya@codeaurora.org> | 2018-04-02 13:48:00 -0400 |
|---|---|---|
| committer | Matt Turner <mattst88@gmail.com> | 2018-04-07 15:04:15 -0700 |
| commit | cd0e00c106722eca40b38ebf11cf134c01901086 (patch) | |
| tree | 3cc22abf68b50fb7e220d1554b48a0ebf50804e3 | |
| parent | 6fd16ce5590e30d0ed8b21e977102361ff9f92ef (diff) | |
| download | linux-cd0e00c106722eca40b38ebf11cf134c01901086.tar.bz2 | |
alpha: io: reorder barriers to guarantee writeX() and iowriteX() ordering
memory-barriers.txt has been updated with the following requirement.
"When using writel(), a prior wmb() is not needed to guarantee that the
cache coherent memory writes have completed before writing to the MMIO
region."
Current writeX() and iowriteX() implementations on alpha are not
satisfying this requirement as the barrier is after the register write.
Move mb() in writeX() and iowriteX() functions to guarantee that HW
observes memory changes before performing register operations.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Matt Turner <mattst88@gmail.com>
| -rw-r--r-- | arch/alpha/include/asm/io.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/alpha/include/asm/io.h b/arch/alpha/include/asm/io.h index d123ff90f7a8..4c533fc94d62 100644 --- a/arch/alpha/include/asm/io.h +++ b/arch/alpha/include/asm/io.h @@ -341,14 +341,14 @@ extern inline unsigned int ioread16(void __iomem *addr) extern inline void iowrite8(u8 b, void __iomem *addr) { - IO_CONCAT(__IO_PREFIX,iowrite8)(b, addr); mb(); + IO_CONCAT(__IO_PREFIX, iowrite8)(b, addr); } extern inline void iowrite16(u16 b, void __iomem *addr) { - IO_CONCAT(__IO_PREFIX,iowrite16)(b, addr); mb(); + IO_CONCAT(__IO_PREFIX, iowrite16)(b, addr); } extern inline u8 inb(unsigned long port) @@ -382,8 +382,8 @@ extern inline unsigned int ioread32(void __iomem *addr) extern inline void iowrite32(u32 b, void __iomem *addr) { - IO_CONCAT(__IO_PREFIX,iowrite32)(b, addr); mb(); + IO_CONCAT(__IO_PREFIX, iowrite32)(b, addr); } extern inline u32 inl(unsigned long port) @@ -434,14 +434,14 @@ extern inline u16 readw(const volatile void __iomem *addr) extern inline void writeb(u8 b, volatile void __iomem *addr) { - __raw_writeb(b, addr); mb(); + __raw_writeb(b, addr); } extern inline void writew(u16 b, volatile void __iomem *addr) { - __raw_writew(b, addr); mb(); + __raw_writew(b, addr); } #endif @@ -482,14 +482,14 @@ extern inline u64 readq(const volatile void __iomem *addr) extern inline void writel(u32 b, volatile void __iomem *addr) { - __raw_writel(b, addr); mb(); + __raw_writel(b, addr); } extern inline void writeq(u64 b, volatile void __iomem *addr) { - __raw_writeq(b, addr); mb(); + __raw_writeq(b, addr); } #endif |