diff options
| author | Stephen Boyd <sboyd@codeaurora.org> | 2016-06-30 12:14:50 -0700 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-06-30 12:14:50 -0700 |
| commit | a31bb032638bfcc54484751a46e5a6313a19cae6 (patch) | |
| tree | f03bf1f2b18f00195307ab5b9707249d86972f6f | |
| parent | 5ff5ec59c4583f02e6472a9f7a967165e8b067fc (diff) | |
| parent | 6fb924dc9c482557ebd41f6c6a5fde34210a2e08 (diff) | |
| download | linux-a31bb032638bfcc54484751a46e5a6313a19cae6.tar.bz2 | |
Merge branch 'clk-hi6220-rtc' into clk-next
* clk-hi6220-rtc:
clk: hi6220: Add RTC clock for pl031
| -rw-r--r-- | drivers/clk/hisilicon/clk-hi6220.c | 2 | ||||
| -rw-r--r-- | include/dt-bindings/clock/hi6220-clock.h | 5 |
2 files changed, 5 insertions, 2 deletions
diff --git a/drivers/clk/hisilicon/clk-hi6220.c b/drivers/clk/hisilicon/clk-hi6220.c index f02cb41d40a4..76de9a762a86 100644 --- a/drivers/clk/hisilicon/clk-hi6220.c +++ b/drivers/clk/hisilicon/clk-hi6220.c @@ -68,6 +68,8 @@ static struct hisi_gate_clock hi6220_separated_gate_clks_ao[] __initdata = { { HI6220_TIMER7_PCLK, "timer7_pclk", "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 22, 0, }, { HI6220_TIMER8_PCLK, "timer8_pclk", "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 23, 0, }, { HI6220_UART0_PCLK, "uart0_pclk", "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 24, 0, }, + { HI6220_RTC0_PCLK, "rtc0_pclk", "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 25, 0, }, + { HI6220_RTC1_PCLK, "rtc1_pclk", "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 26, 0, }, }; static void __init hi6220_clk_ao_init(struct device_node *np) diff --git a/include/dt-bindings/clock/hi6220-clock.h b/include/dt-bindings/clock/hi6220-clock.h index 70ee3833a7a0..6b03c84f4278 100644 --- a/include/dt-bindings/clock/hi6220-clock.h +++ b/include/dt-bindings/clock/hi6220-clock.h @@ -55,8 +55,9 @@ #define HI6220_TIMER7_PCLK 34 #define HI6220_TIMER8_PCLK 35 #define HI6220_UART0_PCLK 36 - -#define HI6220_AO_NR_CLKS 37 +#define HI6220_RTC0_PCLK 37 +#define HI6220_RTC1_PCLK 38 +#define HI6220_AO_NR_CLKS 39 /* clk in Hi6220 systrl */ /* gate clock */ |