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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-12-28 20:08:34 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-12-28 20:08:34 -0800 |
| commit | 030672aea826adf3dee9100ee8ac303b62c8fe7f (patch) | |
| tree | c9815fcd276e4c61b864790e81e5cbca16b80142 | |
| parent | 24dc83635ffe3c93d8122099a83ee228c9b7e4f7 (diff) | |
| parent | 5801169a2ed20003f771acecf3ac00574cf10a38 (diff) | |
| download | linux-030672aea826adf3dee9100ee8ac303b62c8fe7f.tar.bz2 | |
Merge tag 'devicetree-for-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull Devicetree updates from Rob Herring:
"The biggest highlight here is the start of using json-schema for DT
bindings. Being able to validate bindings has been discussed for years
with little progress.
- Initial support for DT bindings using json-schema language. This is
the start of converting DT bindings from free-form text to a
structured format.
- Reworking of initrd address initialization. This moves to using the
phys address instead of virt addr in the DT parsing code. This
rework was motivated by CONFIG_DEV_BLK_INITRD causing unnecessary
rebuilding of lots of files.
- Fix stale phandle entries in phandle cache
- DT overlay validation improvements. This exposed several memory
leak bugs which have been fixed.
- Use node name and device_type helper functions in DT code
- Last remaining conversions to using %pOFn printk specifier instead
of device_node.name directly
- Create new common RTC binding doc and move all trivial RTC devices
out of trivial-devices.txt.
- New bindings for Freescale MAG3110 magnetometer, Cadence Sierra
PHY, and Xen shared memory
- Update dtc to upstream version v1.4.7-57-gf267e674d145"
* tag 'devicetree-for-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (68 commits)
of: __of_detach_node() - remove node from phandle cache
of: of_node_get()/of_node_put() nodes held in phandle cache
gpio-omap.txt: add reg and interrupts properties
dt-bindings: mrvl,intc: fix a trivial typo
dt-bindings: iio: magnetometer: add dt-bindings for freescale mag3110
dt-bindings: Convert trivial-devices.txt to json-schema
dt-bindings: arm: mrvl: amend Browstone compatible string
dt-bindings: arm: Convert Tegra board/soc bindings to json-schema
dt-bindings: arm: Convert ZTE board/soc bindings to json-schema
dt-bindings: arm: Add missing Xilinx boards
dt-bindings: arm: Convert Xilinx board/soc bindings to json-schema
dt-bindings: arm: Convert VIA board/soc bindings to json-schema
dt-bindings: arm: Convert ST STi board/soc bindings to json-schema
dt-bindings: arm: Convert SPEAr board/soc bindings to json-schema
dt-bindings: arm: Convert CSR SiRF board/soc bindings to json-schema
dt-bindings: arm: Convert QCom board/soc bindings to json-schema
dt-bindings: arm: Convert TI nspire board/soc bindings to json-schema
dt-bindings: arm: Convert TI davinci board/soc bindings to json-schema
dt-bindings: arm: Convert Calxeda board/soc bindings to json-schema
dt-bindings: arm: Convert Altera board/soc bindings to json-schema
...
112 files changed, 3461 insertions, 1772 deletions
diff --git a/.gitignore b/.gitignore index 97ba6b79834c..a20ac26aa2f5 100644 --- a/.gitignore +++ b/.gitignore @@ -15,6 +15,7 @@ *.bin *.bz2 *.c.[012]*.* +*.dt.yaml *.dtb *.dtb.S *.dwo diff --git a/Documentation/Makefile b/Documentation/Makefile index 2ca77ad0f238..9786957c6a35 100644 --- a/Documentation/Makefile +++ b/Documentation/Makefile @@ -2,7 +2,7 @@ # Makefile for Sphinx documentation # -subdir-y := +subdir-y := devicetree/bindings/ # You can set these variables from the command line. SPHINXBUILD = sphinx-build diff --git a/Documentation/devicetree/bindings/.gitignore b/Documentation/devicetree/bindings/.gitignore new file mode 100644 index 000000000000..ef82fcfcccab --- /dev/null +++ b/Documentation/devicetree/bindings/.gitignore @@ -0,0 +1,2 @@ +*.example.dts +processed-schema.yaml diff --git a/Documentation/devicetree/bindings/Makefile b/Documentation/devicetree/bindings/Makefile new file mode 100644 index 000000000000..6e5cef0ed6fb --- /dev/null +++ b/Documentation/devicetree/bindings/Makefile @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: GPL-2.0 +DT_DOC_CHECKER ?= dt-doc-validate +DT_EXTRACT_EX ?= dt-extract-example +DT_MK_SCHEMA ?= dt-mk-schema +DT_MK_SCHEMA_FLAGS := $(if $(DT_SCHEMA_FILES), -u) + +quiet_cmd_chk_binding = CHKDT $(patsubst $(srctree)/%,%,$<) + cmd_chk_binding = $(DT_DOC_CHECKER) $< ; \ + $(DT_EXTRACT_EX) $< > $@ + +$(obj)/%.example.dts: $(src)/%.yaml FORCE + $(call if_changed,chk_binding) + +DT_TMP_SCHEMA := processed-schema.yaml +extra-y += $(DT_TMP_SCHEMA) + +quiet_cmd_mk_schema = SCHEMA $@ + cmd_mk_schema = $(DT_MK_SCHEMA) $(DT_MK_SCHEMA_FLAGS) -o $@ $(filter-out FORCE, $^) + +DT_DOCS = $(shell cd $(srctree)/$(src) && find * -name '*.yaml') +DT_SCHEMA_FILES ?= $(addprefix $(src)/,$(DT_DOCS)) + +extra-y += $(patsubst $(src)/%.yaml,%.example.dts, $(DT_SCHEMA_FILES)) +extra-y += $(patsubst $(src)/%.yaml,%.example.dtb, $(DT_SCHEMA_FILES)) + +$(obj)/$(DT_TMP_SCHEMA): $(DT_SCHEMA_FILES) FORCE + $(call if_changed,mk_schema) diff --git a/Documentation/devicetree/bindings/arm/altera.txt b/Documentation/devicetree/bindings/arm/altera.txt deleted file mode 100644 index 558735aacca8..000000000000 --- a/Documentation/devicetree/bindings/arm/altera.txt +++ /dev/null @@ -1,14 +0,0 @@ -Altera's SoCFPGA platform device tree bindings ---------------------------------------------- - -Boards with Cyclone 5 SoC: -Required root node properties: -compatible = "altr,socfpga-cyclone5", "altr,socfpga"; - -Boards with Arria 5 SoC: -Required root node properties: -compatible = "altr,socfpga-arria5", "altr,socfpga"; - -Boards with Arria 10 SoC: -Required root node properties: -compatible = "altr,socfpga-arria10", "altr,socfpga"; diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml new file mode 100644 index 000000000000..49e0362ddc11 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/altera.yaml @@ -0,0 +1,20 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/altera.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Altera's SoCFPGA platform device tree bindings + +maintainers: + - Dinh Nguyen <dinguyen@kernel.org> + +properties: + compatible: + items: + - enum: + - altr,socfpga-cyclone5 + - altr,socfpga-arria5 + - altr,socfpga-arria10 + - const: altr,socfpga +... diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.txt deleted file mode 100644 index 2c28f1d12f45..000000000000 --- a/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.txt +++ /dev/null @@ -1,11 +0,0 @@ -Altera SOCFPGA Clock Manager - -Required properties: -- compatible : "altr,clk-mgr" -- reg : Should contain base address and length for Clock Manager - -Example: - clkmgr@ffd04000 { - compatible = "altr,clk-mgr"; - reg = <0xffd04000 0x1000>; - }; diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml b/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml new file mode 100644 index 000000000000..e4131fa42b26 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml @@ -0,0 +1,31 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/altera/socfpga-clk-manager.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Altera SOCFPGA Clock Manager + +maintainers: + - Dinh Nguyen <dinguyen@kernel.org> + +description: test + +properties: + compatible: + items: + - const: altr,clk-mgr + reg: + maxItems: 1 + +required: + - compatible + +examples: + - | + clkmgr@ffd04000 { + compatible = "altr,clk-mgr"; + reg = <0xffd04000 0x1000>; + }; + +... diff --git a/Documentation/devicetree/bindings/arm/calxeda.txt b/Documentation/devicetree/bindings/arm/calxeda.txt deleted file mode 100644 index 25fcf96795ca..000000000000 --- a/Documentation/devicetree/bindings/arm/calxeda.txt +++ /dev/null @@ -1,15 +0,0 @@ -Calxeda Platforms Device Tree Bindings ------------------------------------------------ - -Boards with Calxeda Cortex-A9 based ECX-1000 (Highbank) SOC shall have the -following properties. - -Required root node properties: - - compatible = "calxeda,highbank"; - - -Boards with Calxeda Cortex-A15 based ECX-2000 SOC shall have the following -properties. - -Required root node properties: - - compatible = "calxeda,ecx-2000"; diff --git a/Documentation/devicetree/bindings/arm/calxeda.yaml b/Documentation/devicetree/bindings/arm/calxeda.yaml new file mode 100644 index 000000000000..aa5571d23c39 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/calxeda.yaml @@ -0,0 +1,22 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/calxeda.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Calxeda Platforms Device Tree Bindings + +maintainers: + - Rob Herring <robh@kernel.org> +description: |+ + Bindings for boards with Calxeda Cortex-A9 based ECX-1000 (Highbank) SOC + or Cortex-A15 based ECX-2000 SOCs + +properties: + $nodename: + const: '/' + compatible: + items: + - enum: + - calxeda,highbank + - calxeda,ecx-2000 diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt deleted file mode 100644 index b0198a1cf403..000000000000 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ /dev/null @@ -1,490 +0,0 @@ -================= -ARM CPUs bindings -================= - -The device tree allows to describe the layout of CPUs in a system through -the "cpus" node, which in turn contains a number of subnodes (ie "cpu") -defining properties for every cpu. - -Bindings for CPU nodes follow the Devicetree Specification, available from: - -https://www.devicetree.org/specifications/ - -with updates for 32-bit and 64-bit ARM systems provided in this document. - -================================ -Convention used in this document -================================ - -This document follows the conventions described in the Devicetree -Specification, with the addition: - -- square brackets define bitfields, eg reg[7:0] value of the bitfield in - the reg property contained in bits 7 down to 0 - -===================================== -cpus and cpu node bindings definition -===================================== - -The ARM architecture, in accordance with the Devicetree Specification, -requires the cpus and cpu nodes to be present and contain the properties -described below. - -- cpus node - - Description: Container of cpu nodes - - The node name must be "cpus". - - A cpus node must define the following properties: - - - #address-cells - Usage: required - Value type: <u32> - - Definition depends on ARM architecture version and - configuration: - - # On uniprocessor ARM architectures previous to v7 - value must be 1, to enable a simple enumeration - scheme for processors that do not have a HW CPU - identification register. - # On 32-bit ARM 11 MPcore, ARM v7 or later systems - value must be 1, that corresponds to CPUID/MPIDR - registers sizes. - # On ARM v8 64-bit systems value should be set to 2, - that corresponds to the MPIDR_EL1 register size. - If MPIDR_EL1[63:32] value is equal to 0 on all CPUs - in the system, #address-cells can be set to 1, since - MPIDR_EL1[63:32] bits are not used for CPUs - identification. - - #size-cells - Usage: required - Value type: <u32> - Definition: must be set to 0 - -- cpu node - - Description: Describes a CPU in an ARM based system - - PROPERTIES - - - device_type - Usage: required - Value type: <string> - Definition: must be "cpu" - - reg - Usage and definition depend on ARM architecture version and - configuration: - - # On uniprocessor ARM architectures previous to v7 - this property is required and must be set to 0. - - # On ARM 11 MPcore based systems this property is - required and matches the CPUID[11:0] register bits. - - Bits [11:0] in the reg cell must be set to - bits [11:0] in CPU ID register. - - All other bits in the reg cell must be set to 0. - - # On 32-bit ARM v7 or later systems this property is - required and matches the CPU MPIDR[23:0] register - bits. - - Bits [23:0] in the reg cell must be set to - bits [23:0] in MPIDR. - - All other bits in the reg cell must be set to 0. - - # On ARM v8 64-bit systems this property is required - and matches the MPIDR_EL1 register affinity bits. - - * If cpus node's #address-cells property is set to 2 - - The first reg cell bits [7:0] must be set to - bits [39:32] of MPIDR_EL1. - - The second reg cell bits [23:0] must be set to - bits [23:0] of MPIDR_EL1. - - * If cpus node's #address-cells property is set to 1 - - The reg cell bits [23:0] must be set to bits [23:0] - of MPIDR_EL1. - - All other bits in the reg cells must be set to 0. - - - compatible: - Usage: required - Value type: <string> - Definition: should be one of: - "arm,arm710t" - "arm,arm720t" - "arm,arm740t" - "arm,arm7ej-s" - "arm,arm7tdmi" - "arm,arm7tdmi-s" - "arm,arm9es" - "arm,arm9ej-s" - "arm,arm920t" - "arm,arm922t" - "arm,arm925" - "arm,arm926e-s" - "arm,arm926ej-s" - "arm,arm940t" - "arm,arm946e-s" - "arm,arm966e-s" - "arm,arm968e-s" - "arm,arm9tdmi" - "arm,arm1020e" - "arm,arm1020t" - "arm,arm1022e" - "arm,arm1026ej-s" - "arm,arm1136j-s" - "arm,arm1136jf-s" - "arm,arm1156t2-s" - "arm,arm1156t2f-s" - "arm,arm1176jzf" - "arm,arm1176jz-s" - "arm,arm1176jzf-s" - "arm,arm11mpcore" - "arm,cortex-a5" - "arm,cortex-a7" - "arm,cortex-a8" - "arm,cortex-a9" - "arm,cortex-a12" - "arm,cortex-a15" - "arm,cortex-a17" - "arm,cortex-a53" - "arm,cortex-a57" - "arm,cortex-a72" - "arm,cortex-a73" - "arm,cortex-m0" - "arm,cortex-m0+" - "arm,cortex-m1" - "arm,cortex-m3" - "arm,cortex-m4" - "arm,cortex-r4" - "arm,cortex-r5" - "arm,cortex-r7" - "brcm,brahma-b15" - "brcm,brahma-b53" - "brcm,vulcan" - "cavium,thunder" - "cavium,thunder2" - "faraday,fa526" - "intel,sa110" - "intel,sa1100" - "marvell,feroceon" - "marvell,mohawk" - "marvell,pj4a" - "marvell,pj4b" - "marvell,sheeva-v5" - "nvidia,tegra132-denver" - "nvidia,tegra186-denver" - "nvidia,tegra194-carmel" - "qcom,krait" - "qcom,kryo" - "qcom,kryo385" - "qcom,scorpion" - - enable-method - Value type: <stringlist> - Usage and definition depend on ARM architecture version. - # On ARM v8 64-bit this property is required and must - be one of: - "psci" - "spin-table" - # On ARM 32-bit systems this property is optional and - can be one of: - "actions,s500-smp" - "allwinner,sun6i-a31" - "allwinner,sun8i-a23" - "allwinner,sun9i-a80-smp" - "amlogic,meson8-smp" - "amlogic,meson8b-smp" - "arm,realview-smp" - "brcm,bcm11351-cpu-method" - "brcm,bcm23550" - "brcm,bcm2836-smp" - "brcm,bcm-nsp-smp" - "brcm,brahma-b15" - "marvell,armada-375-smp" - "marvell,armada-380-smp" - "marvell,armada-390-smp" - "marvell,armada-xp-smp" - "marvell,98dx3236-smp" - "mediatek,mt6589-smp" - "mediatek,mt81xx-tz-smp" - "qcom,gcc-msm8660" - "qcom,kpss-acc-v1" - "qcom,kpss-acc-v2" - "renesas,apmu" - "renesas,r9a06g032-smp" - "rockchip,rk3036-smp" - "rockchip,rk3066-smp" - "ste,dbx500-smp" - - - cpu-release-addr - Usage: required for systems that have an "enable-method" - property value of "spin-table". - Value type: <prop-encoded-array> - Definition: - # On ARM v8 64-bit systems must be a two cell - property identifying a 64-bit zero-initialised - memory location. - - - qcom,saw - Usage: required for systems that have an "enable-method" - property value of "qcom,kpss-acc-v1" or - "qcom,kpss-acc-v2" - Value type: <phandle> - Definition: Specifies the SAW[1] node associated with this CPU. - - - qcom,acc - Usage: required for systems that have an "enable-method" - property value of "qcom,kpss-acc-v1" or - "qcom,kpss-acc-v2" - Value type: <phandle> - Definition: Specifies the ACC[2] node associated with this CPU. - - - cpu-idle-states - Usage: Optional - Value type: <prop-encoded-array> - Definition: - # List of phandles to idle state nodes supported - by this cpu [3]. - - - capacity-dmips-mhz - Usage: Optional - Value type: <u32> - Definition: - # u32 value representing CPU capacity [4] in - DMIPS/MHz, relative to highest capacity-dmips-mhz - in the system. - - - rockchip,pmu - Usage: optional for systems that have an "enable-method" - property value of "rockchip,rk3066-smp" - While optional, it is the preferred way to get access to - the cpu-core power-domains. - Value type: <phandle> - Definition: Specifies the syscon node controlling the cpu core - power domains. - - - dynamic-power-coefficient - Usage: optional - Value type: <prop-encoded-array> - Definition: A u32 value that represents the running time dynamic - power coefficient in units of uW/MHz/V^2. The - coefficient can either be calculated from power - measurements or derived by analysis. - - The dynamic power consumption of the CPU is - proportional to the square of the Voltage (V) and - the clock frequency (f). The coefficient is used to - calculate the dynamic power as below - - - Pdyn = dynamic-power-coefficient * V^2 * f - - where voltage is in V, frequency is in MHz. - -Example 1 (dual-cluster big.LITTLE system 32-bit): - - cpus { - #size-cells = <0>; - #address-cells = <1>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x0>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x1>; - }; - - cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x100>; - }; - - cpu@101 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x101>; - }; - }; - -Example 2 (Cortex-A8 uniprocessor 32-bit system): - - cpus { - #size-cells = <0>; - #address-cells = <1>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a8"; - reg = <0x0>; - }; - }; - -Example 3 (ARM 926EJ-S uniprocessor 32-bit system): - - cpus { - #size-cells = <0>; - #address-cells = <1>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,arm926ej-s"; - reg = <0x0>; - }; - }; - -Example 4 (ARM Cortex-A57 64-bit system): - -cpus { - #size-cells = <0>; - #address-cells = <2>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x0>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x1>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x100>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - cpu@101 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x101>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - cpu@10000 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x10000>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - cpu@10001 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x10001>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - cpu@10100 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x10100>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - cpu@10101 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x10101>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - cpu@100000000 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x0>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - cpu@100000001 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x1>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - cpu@100000100 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x100>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - cpu@100000101 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x101>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - cpu@100010000 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x10000>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - cpu@100010001 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x10001>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - cpu@100010100 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x10100>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - cpu@100010101 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x10101>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; -}; - --- -[1] arm/msm/qcom,saw2.txt -[2] arm/msm/qcom,kpss-acc.txt -[3] ARM Linux kernel documentation - idle states bindings - Documentation/devicetree/bindings/arm/idle-states.txt -[4] ARM Linux kernel documentation - cpu capacity bindings - Documentation/devicetree/bindings/arm/cpu-capacity.txt diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml new file mode 100644 index 000000000000..298c17b327c6 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -0,0 +1,507 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/cpus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM CPUs bindings + +maintainers: + - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> + +description: |+ + The device tree allows to describe the layout of CPUs in a system through + the "cpus" node, which in turn contains a number of subnodes (ie "cpu") + defining properties for every cpu. + + Bindings for CPU nodes follow the Devicetree Specification, available from: + + https://www.devicetree.org/specifications/ + + with updates for 32-bit and 64-bit ARM systems provided in this document. + + ================================ + Convention used in this document + ================================ + + This document follows the conventions described in the Devicetree + Specification, with the addition: + + - square brackets define bitfields, eg reg[7:0] value of the bitfield in + the reg property contained in bits 7 down to 0 + + ===================================== + cpus and cpu node bindings definition + ===================================== + + The ARM architecture, in accordance with the Devicetree Specification, + requires the cpus and cpu nodes to be present and contain the properties + described below. + +properties: + $nodename: + const: cpus + description: Container of cpu nodes + + '#address-cells': + enum: [1, 2] + description: | + Definition depends on ARM architecture version and configuration: + + On uniprocessor ARM architectures previous to v7 + value must be 1, to enable a simple enumeration + scheme for processors that do not have a HW CPU + identification register. + On 32-bit ARM 11 MPcore, ARM v7 or later systems + value must be 1, that corresponds to CPUID/MPIDR + registers sizes. + On ARM v8 64-bit systems value should be set to 2, + that corresponds to the MPIDR_EL1 register size. + If MPIDR_EL1[63:32] value is equal to 0 on all CPUs + in the system, #address-cells can be set to 1, since + MPIDR_EL1[63:32] bits are not used for CPUs + identification. + + '#size-cells': + const: 0 + +patternProperties: + '^cpu@[0-9a-f]+$': + properties: + device_type: + const: cpu + + reg: + maxItems: 1 + description: | + Usage and definition depend on ARM architecture version and + configuration: + + On uniprocessor ARM architectures previous to v7 + this property is required and must be set to 0. + + On ARM 11 MPcore based systems this property is + required and matches the CPUID[11:0] register bits. + + Bits [11:0] in the reg cell must be set to + bits [11:0] in CPU ID register. + + All other bits in the reg cell must be set to 0. + + On 32-bit ARM v7 or later systems this property is + required and matches the CPU MPIDR[23:0] register + bits. + + Bits [23:0] in the reg cell must be set to + bits [23:0] in MPIDR. + + All other bits in the reg cell must be set to 0. + + On ARM v8 64-bit systems this property is required + and matches the MPIDR_EL1 register affinity bits. + + * If cpus node's #address-cells property is set to 2 + + The first reg cell bits [7:0] must be set to + bits [39:32] of MPIDR_EL1. + + The second reg cell bits [23:0] must be set to + bits [23:0] of MPIDR_EL1. + + * If cpus node's #address-cells property is set to 1 + + The reg cell bits [23:0] must be set to bits [23:0] + of MPIDR_EL1. + + All other bits in the reg cells must be set to 0. + + compatible: + items: + - enum: + - arm,arm710t + - arm,arm720t + - arm,arm740t + - arm,arm7ej-s + - arm,arm7tdmi + - arm,arm7tdmi-s + - arm,arm9es + - arm,arm9ej-s + - arm,arm920t + - arm,arm922t + - arm,arm925 + - arm,arm926e-s + - arm,arm926ej-s + - arm,arm940t + - arm,arm946e-s + - arm,arm966e-s + - arm,arm968e-s + - arm,arm9tdmi + - arm,arm1020e + - arm,arm1020t + - arm,arm1022e + - arm,arm1026ej-s + - arm,arm1136j-s + - arm,arm1136jf-s + - arm,arm1156t2-s + - arm,arm1156t2f-s + - arm,arm1176jzf + - arm,arm1176jz-s + - arm,arm1176jzf-s + - arm,arm11mpcore + - arm,armv8 # Only for s/w models + - arm,cortex-a5 + - arm,cortex-a7 + - arm,cortex-a8 + - arm,cortex-a9 + - arm,cortex-a12 + - arm,cortex-a15 + - arm,cortex-a17 + - arm,cortex-a53 + - arm,cortex-a57 + - arm,cortex-a72 + - arm,cortex-a73 + - arm,cortex-m0 + - arm,cortex-m0+ + - arm,cortex-m1 + - arm,cortex-m3 + - arm,cortex-m4 + - arm,cortex-r4 + - arm,cortex-r5 + - arm,cortex-r7 + - brcm,brahma-b15 + - brcm,brahma-b53 + - brcm,vulcan + - cavium,thunder + - cavium,thunder2 + - faraday,fa526 + - intel,sa110 + - intel,sa1100 + - marvell,feroceon + - marvell,mohawk + - marvell,pj4a + - marvell,pj4b + - marvell,sheeva-v5 + - marvell,sheeva-v7 + - nvidia,tegra132-denver + - nvidia,tegra186-denver + - nvidia,tegra194-carmel + - qcom,krait + - qcom,kryo + - qcom,kryo385 + - qcom,scorpion + + enable-method: + allOf: + - $ref: '/schemas/types.yaml#/definitions/string' + - oneOf: + # On ARM v8 64-bit this property is required + - enum: + - psci + - spin-table + # On ARM 32-bit systems this property is optional + - enum: + - actions,s500-smp + - allwinner,sun6i-a31 + - allwinner,sun8i-a23 + - allwinner,sun9i-a80-smp + - allwinner,sun8i-a83t-smp + - amlogic,meson8-smp + - amlogic,meson8b-smp + - arm,realview-smp + - brcm,bcm11351-cpu-method + - brcm,bcm23550 + - brcm,bcm2836-smp + - brcm,bcm63138 + - brcm,bcm-nsp-smp + - brcm,brahma-b15 + - marvell,armada-375-smp + - marvell,armada-380-smp + - marvell,armada-390-smp + - marvell,armada-xp-smp + - marvell,98dx3236-smp + - mediatek,mt6589-smp + - mediatek,mt81xx-tz-smp + - qcom,gcc-msm8660 + - qcom,kpss-acc-v1 + - qcom,kpss-acc-v2 + - renesas,apmu + - renesas,r9a06g032-smp + - rockchip,rk3036-smp + - rockchip,rk3066-smp + - ste,dbx500-smp + + cpu-release-addr: + $ref: '/schemas/types.yaml#/definitions/uint64' + + description: + Required for systems that have an "enable-method" + property value of "spin-table". + On ARM v8 64-bit systems must be a two cell + property identifying a 64-bit zero-initialised + memory location. + + cpu-idle-states: + $ref: '/schemas/types.yaml#/definitions/phandle-array' + description: | + List of phandles to idle state nodes supported + by this cpu (see ./idle-states.txt). + + capacity-dmips-mhz: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: + u32 value representing CPU capacity (see ./cpu-capacity.txt) in + DMIPS/MHz, relative to highest capacity-dmips-mhz + in the system. + + dynamic-power-coefficient: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: + A u32 value that represents the running time dynamic + power coefficient in units of uW/MHz/V^2. The + coefficient can either be calculated from power + measurements or derived by analysis. + + The dynamic power consumption of the CPU is + proportional to the square of the Voltage (V) and + the clock frequency (f). The coefficient is used to + calculate the dynamic power as below - + + Pdyn = dynamic-power-coefficient * V^2 * f + + where voltage is in V, frequency is in MHz. + + qcom,saw: + $ref: '/schemas/types.yaml#/definitions/phandle' + description: | + Specifies the SAW* node associated with this CPU. + + Required for systems that have an "enable-method" property + value of "qcom,kpss-acc-v1" or "qcom,kpss-acc-v2" + + * arm/msm/qcom,saw2.txt + + qcom,acc: + $ref: '/schemas/types.yaml#/definitions/phandle' + description: | + Specifies the ACC* node associated with this CPU. + + Required for systems that have an "enable-method" property + value of "qcom,kpss-acc-v1" or "qcom,kpss-acc-v2" + + * arm/msm/qcom,kpss-acc.txt + + rockchip,pmu: + $ref: '/schemas/types.yaml#/definitions/phandle' + description: | + Specifies the syscon node controlling the cpu core power domains. + + Optional for systems that have an "enable-method" + property value of "rockchip,rk3066-smp" + While optional, it is the preferred way to get access to + the cpu-core power-domains. + + required: + - device_type + - reg + - compatible + + dependencies: + cpu-release-addr: [enable-method] + rockchip,pmu: [enable-method] + +required: + - '#address-cells' + - '#size-cells' + +examples: + - | + cpus { + #size-cells = <0>; + #address-cells = <1>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x1>; + }; + + cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x100>; + }; + + cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x101>; + }; + }; + + - | + // Example 2 (Cortex-A8 uniprocessor 32-bit system): + cpus { + #size-cells = <0>; + #address-cells = <1>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a8"; + reg = <0x0>; + }; + }; + + - | + // Example 3 (ARM 926EJ-S uniprocessor 32-bit system): + cpus { + #size-cells = <0>; + #address-cells = <1>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,arm926ej-s"; + reg = <0x0>; + }; + }; + + - | + // Example 4 (ARM Cortex-A57 64-bit system): + cpus { + #size-cells = <0>; + #address-cells = <2>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x0>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x20000000>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x1>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x20000000>; + }; + + cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x100>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x20000000>; + }; + + cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x101>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x20000000>; + }; + + cpu@10000 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x10000>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x20000000>; + }; + + cpu@10001 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x10001>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x20000000>; + }; + + cpu@10100 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x10100>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x20000000>; + }; + + cpu@10101 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x10101>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x20000000>; + }; + + cpu@100000000 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x1 0x0>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x20000000>; + }; + + cpu@100000001 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x1 0x1>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x20000000>; + }; + + cpu@100000100 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x1 0x100>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x20000000>; + }; + + cpu@100000101 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x1 0x101>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x20000000>; + }; + + cpu@100010000 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x1 0x10000>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x20000000>; + }; + + cpu@100010001 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x1 0x10001>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x20000000>; + }; + + cpu@100010100 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x1 0x10100>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x20000000>; + }; + + cpu@100010101 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x1 0x10101>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x20000000>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/arm/davinci.txt b/Documentation/devicetree/bindings/arm/davinci.txt deleted file mode 100644 index 715622c36260..000000000000 --- a/Documentation/devicetree/bindings/arm/davinci.txt +++ /dev/null @@ -1,25 +0,0 @@ -Texas Instruments DaVinci Platforms Device Tree Bindings --------------------------------------------------------- - -DA850/OMAP-L138/AM18x Evaluation Module (EVM) board -Required root node properties: - - compatible = "ti,da850-evm", "ti,da850"; - -DA850/OMAP-L138/AM18x L138/C6748 Development Kit (LCDK) board -Required root node properties: - - compatible = "ti,da850-lcdk", "ti,da850"; - -EnBW AM1808 based CMC board -Required root node properties: - - compatible = "enbw,cmc", "ti,da850; - -LEGO MINDSTORMS EV3 (AM1808 based) -Required root node properties: - - compatible = "lego,ev3", "ti,da850"; - -Generic DaVinci Boards ----------------------- - -DA850/OMAP-L138/AM18x generic board -Required root node properties: - - compatible = "ti,da850"; diff --git a/Documentation/devicetree/bindings/arm/mrvl/mrvl.txt b/Documentation/devicetree/bindings/arm/mrvl/mrvl.txt index 117d741a2e4f..951687528efb 100644 --- a/Documentation/devicetree/bindings/arm/mrvl/mrvl.txt +++ b/Documentation/devicetree/bindings/arm/mrvl/mrvl.txt @@ -11,4 +11,4 @@ Required root node properties: MMP2 Brownstone Board Required root node properties: - - compatible = "mrvl,mmp2-brownstone"; + - compatible = "mrvl,mmp2-brownstone", "mrvl,mmp2"; diff --git a/Documentation/devicetree/bindings/arm/nspire.txt b/Documentation/devicetree/bindings/arm/nspire.txt deleted file mode 100644 index 4d08518bd176..000000000000 --- a/Documentation/devicetree/bindings/arm/nspire.txt +++ /dev/null @@ -1,14 +0,0 @@ -TI-NSPIRE calculators - -Required properties: -- compatible: Compatible property value should contain "ti,nspire". - CX models should have "ti,nspire-cx" - Touchpad models should have "ti,nspire-tp" - Clickpad models should have "ti,nspire-clp" - -Example: - -/ { - model = "TI-NSPIRE CX"; - compatible = "ti,nspire-cx"; - ... diff --git a/Documentation/devicetree/bindings/arm/primecell.txt b/Documentation/devicetree/bindings/arm/primecell.txt deleted file mode 100644 index 0df6acacfaea..000000000000 --- a/Documentation/devicetree/bindings/arm/primecell.txt +++ /dev/null @@ -1,46 +0,0 @@ -* ARM Primecell Peripherals - -ARM, Ltd. Primecell peripherals have a standard id register that can be used to -identify the peripheral type, vendor, and revision. This value can be used for -driver matching. - -Required properties: - -- compatible : should be a specific name for the peripheral and - "arm,primecell". The specific name will match the ARM - engineering name for the logic block in the form: "arm,pl???" - -Optional properties: - -- arm,primecell-periphid : Value to override the h/w value with -- clocks : From common clock binding. First clock is phandle to clock for apb - pclk. Additional clocks are optional and specific to those peripherals. -- clock-names : From common clock binding. Shall be "apb_pclk" for first clock. -- dmas : From common DMA binding. If present, refers to one or more dma channels. -- dma-names : From common DMA binding, needs to match the 'dmas' property. - Devices with exactly one receive and transmit channel shall name - these "rx" and "tx", respectively. -- pinctrl-<n> : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt -- pinctrl-names : Names corresponding to the numbered pinctrl states -- interrupts : one or more interrupt specifiers -- interrupt-names : names corresponding to the interrupts properties - -Example: - -serial@fff36000 { - compatible = "arm,pl011", "arm,primecell"; - arm,primecell-periphid = <0x00341011>; - - clocks = <&pclk>; - clock-names = "apb_pclk"; - - dmas = <&dma-controller 4>, <&dma-controller 5>; - dma-names = "rx", "tx"; - - pinctrl-0 = <&uart0_default_mux>, <&uart0_default_mode>; - pinctrl-1 = <&uart0_sleep_mode>; - pinctrl-names = "default","sleep"; - - interrupts = <0 11 0x4>; -}; - diff --git a/Documentation/devicetree/bindings/arm/primecell.yaml b/Documentation/devicetree/bindings/arm/primecell.yaml new file mode 100644 index 000000000000..5aae37f1c563 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/primecell.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/primecell.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM Primecell Peripherals + +maintainers: + - Rob Herring <robh@kernel.org> + +description: |+ + ARM, Ltd. Primecell peripherals have a standard id register that can be used to + identify the peripheral type, vendor, and revision. This value can be used for + driver matching. + +properties: + compatible: + contains: + const: arm,primecell + description: + Should be a specific name for the peripheral followed by "arm,primecell". + The specific name will match the ARM engineering name for the logic block + in the form "arm,pl???" + + arm,primecell-periphid: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Value to override the h/w ID value + clocks: + minItems: 1 + maxItems: 32 + clock-names: + contains: + const: apb_pclk + additionalItems: true +... diff --git a/Documentation/devicetree/bindings/arm/qcom.txt b/Documentation/devicetree/bindings/arm/qcom.txt deleted file mode 100644 index ee532e705d6c..000000000000 --- a/Documentation/devicetree/bindings/arm/qcom.txt +++ /dev/null @@ -1,57 +0,0 @@ -QCOM device tree bindings -------------------------- - -Some qcom based bootloaders identify the dtb blob based on a set of -device properties like SoC and platform and revisions of those components. -To support this scheme, we encode this information into the board compatible -string. - -Each board must specify a top-level board compatible string with the following -format: - - compatible = "qcom,<SoC>[-<soc_version>][-<foundry_id>]-<board>[/<subtype>][-<board_version>]" - -The 'SoC' and 'board' elements are required. All other elements are optional. - -The 'SoC' element must be one of the following strings: - - apq8016 - apq8074 - apq8084 - apq8096 - msm8916 - msm8974 - msm8992 - msm8994 - msm8996 - mdm9615 - ipq8074 - sdm845 - -The 'board' element must be one of the following strings: - - cdp - liquid - dragonboard - mtp - sbc - hk01 - -The 'soc_version' and 'board_version' elements take the form of v<Major>.<Minor> -where the minor number may be omitted when it's zero, i.e. v1.0 is the same -as v1. If all versions of the 'board_version' elements match, then a -wildcard '*' should be used, e.g. 'v*'. - -The 'foundry_id' and 'subtype' elements are one or more digits from 0 to 9. - -Examples: - - "qcom,msm8916-v1-cdp-pm8916-v2.1" - -A CDP board with an msm8916 SoC, version 1 paired with a pm8916 PMIC of version -2.1. - - "qcom,apq8074-v2.0-2-dragonboard/1-v0.1" - -A dragonboard board v0.1 of subtype 1 with an apq8074 SoC version 2, made in -foundry 2. diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml new file mode 100644 index 000000000000..f6316ab66385 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -0,0 +1,125 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bindings/arm/qcom.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: QCOM device tree bindings + +maintainers: + - Stephen Boyd <sboyd@codeaurora.org> + +description: | + Some qcom based bootloaders identify the dtb blob based on a set of + device properties like SoC and platform and revisions of those components. + To support this scheme, we encode this information into the board compatible + string. + + Each board must specify a top-level board compatible string with the following + format: + + compatible = "qcom,<SoC>[-<soc_version>][-<foundry_id>]-<board>[/<subtype>][-<board_version>]" + + The 'SoC' and 'board' elements are required. All other elements are optional. + + The 'SoC' element must be one of the following strings: + + apq8016 + apq8074 + apq8084 + apq8096 + msm8916 + msm8974 + msm8992 + msm8994 + msm8996 + mdm9615 + ipq8074 + sdm845 + + The 'board' element must be one of the following strings: + + cdp + liquid + dragonboard + mtp + sbc + hk01 + + The 'soc_version' and 'board_version' elements take the form of v<Major>.<Minor> + where the minor number may be omitted when it's zero, i.e. v1.0 is the same + as v1. If all versions of the 'board_version' elements match, then a + wildcard '*' should be used, e.g. 'v*'. + + The 'foundry_id' and 'subtype' elements are one or more digits from 0 to 9. + + Examples: + + "qcom,msm8916-v1-cdp-pm8916-v2.1" + + A CDP board with an msm8916 SoC, version 1 paired with a pm8916 PMIC of version + 2.1. + + "qcom,apq8074-v2.0-2-dragonboard/1-v0.1" + + A dragonboard board v0.1 of subtype 1 with an apq8074 SoC version 2, made in + foundry 2. + +properties: + compatible: + oneOf: + - items: + - enum: + - qcom,apq8016-sbc + - const: qcom,apq8016 + + - items: + - enum: + - qcom,apq8064-cm-qs600 + - qcom,apq8064-ifc6410 + - const: qcom,apq8064 + + - items: + - enum: + - qcom,apq8074-dragonboard + - const: qcom,apq8074 + + - items: + - enum: + - qcom,apq8060-dragonboard + - qcom,msm8660-surf + - const: qcom,msm8660 + + - items: + - enum: + - qcom,apq8084-mtp + - qcom,apq8084-sbc + - const: qcom,apq8084 + + - items: + - enum: + - qcom,msm8960-cdp + - const: qcom,msm8960 + + - items: + - const: qcom,msm8916-mtp/1 + - const: qcom,msm8916-mtp + - const: qcom,msm8916 + + - items: + - const: qcom,msm8996-mtp + + - items: + - const: qcom,ipq4019 + + - items: + - enum: + - qcom,ipq8064-ap148 + - const: qcom,ipq8064 + + - items: + - enum: + - qcom,ipq8074-hk01 + - const: qcom,ipq8074 + +... diff --git a/Documentation/devicetree/bindings/arm/sirf.txt b/Documentation/devicetree/bindings/arm/sirf.txt deleted file mode 100644 index 7b28ee6fee91..000000000000 --- a/Documentation/devicetree/bindings/arm/sirf.txt +++ /dev/null @@ -1,11 +0,0 @@ -CSR SiRFprimaII and SiRFmarco device tree bindings. -======================================== - -Required root node properties: - - compatible: - - "sirf,atlas6-cb" : atlas6 "cb" evaluation board - - "sirf,atlas6" : atlas6 device based board - - "sirf,atlas7-cb" : atlas7 "cb" evaluation board - - "sirf,atlas7" : atlas7 device based board - - "sirf,prima2-cb" : prima2 "cb" evaluation board - - "sirf,prima2" : prima2 device based board diff --git a/Documentation/devicetree/bindings/arm/sirf.yaml b/Documentation/devicetree/bindings/arm/sirf.yaml new file mode 100644 index 000000000000..0b597032c923 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/sirf.yaml @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/sirf.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CSR SiRFprimaII and SiRFmarco device tree bindings. + +maintainers: + - Binghua Duan <binghua.duan@csr.com> + - Barry Song <Baohua.Song@csr.com> + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - const: sirf,atlas6-cb + - const: sirf,atlas6 + - items: + - const: sirf,atlas7-cb + - const: sirf,atlas7 + - items: + - const: sirf,prima2-cb + - const: sirf,prima2 +... diff --git a/Documentation/devicetree/bindings/arm/spear.txt b/Documentation/devicetree/bindings/arm/spear.txt deleted file mode 100644 index 0d42949df6c2..000000000000 --- a/Documentation/devicetree/bindings/arm/spear.txt +++ /dev/null @@ -1,26 +0,0 @@ -ST SPEAr Platforms Device Tree Bindings ---------------------------------------- - -Boards with the ST SPEAr600 SoC shall have the following properties: -Required root node property: -compatible = "st,spear600"; - -Boards with the ST SPEAr300 SoC shall have the following properties: -Required root node property: -compatible = "st,spear300"; - -Boards with the ST SPEAr310 SoC shall have the following properties: -Required root node property: -compatible = "st,spear310"; - -Boards with the ST SPEAr320 SoC shall have the following properties: -Required root node property: -compatible = "st,spear320"; - -Boards with the ST SPEAr1310 SoC shall have the following properties: -Required root node property: -compatible = "st,spear1310"; - -Boards with the ST SPEAr1340 SoC shall have the following properties: -Required root node property: -compatible = "st,spear1340"; diff --git a/Documentation/devicetree/bindings/arm/spear.yaml b/Documentation/devicetree/bindings/arm/spear.yaml new file mode 100644 index 000000000000..f6ec731c9531 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/spear.yaml @@ -0,0 +1,25 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/spear.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ST SPEAr Platforms Device Tree Bindings + +maintainers: + - Viresh Kumar <vireshk@kernel.org> + - Stefan Roese <sr@denx.de> + +properties: + $nodename: + const: '/' + compatible: + items: + - enum: + - st,spear600 + - st,spear300 + - st,spear310 + - st,spear320 + - st,spear1310 + - st,spear1340 +... diff --git a/Documentation/devicetree/bindings/arm/sti.txt b/Documentation/devicetree/bindings/arm/sti.txt deleted file mode 100644 index 8d27f6b084c7..000000000000 --- a/Documentation/devicetree/bindings/arm/sti.txt +++ /dev/null @@ -1,23 +0,0 @@ -ST STi Platforms Device Tree Bindings ---------------------------------------- - -Boards with the ST STiH415 SoC shall have the following properties: -Required root node property: -compatible = "st,stih415"; - -Boards with the ST STiH416 SoC shall have the following properties: -Required root node property: -compatible = "st,stih416"; - -Boards with the ST STiH407 SoC shall have the following properties: -Required root node property: -compatible = "st,stih407"; - -Boards with the ST STiH410 SoC shall have the following properties: -Required root node property: -compatible = "st,stih410"; - -Boards with the ST STiH418 SoC shall have the following properties: -Required root node property: -compatible = "st,stih418"; - diff --git a/Documentation/devicetree/bindings/arm/sti.yaml b/Documentation/devicetree/bindings/arm/sti.yaml new file mode 100644 index 000000000000..47f9b8eebaa0 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/sti.yaml @@ -0,0 +1,23 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/sti.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ST STi Platforms Device Tree Bindings + +maintainers: + - Patrice Chotard <patrice.chotard@st.com> + +properties: + $nodename: + const: '/' + compatible: + items: + - enum: + - st,stih415 + - st,stih416 + - st,stih407 + - st,stih410 + - st,stih418 +... diff --git a/Documentation/devicetree/bindings/arm/tegra.txt b/Documentation/devicetree/bindings/arm/tegra.txt deleted file mode 100644 index c59b15f64346..000000000000 --- a/Documentation/devicetree/bindings/arm/tegra.txt +++ /dev/null @@ -1,65 +0,0 @@ -NVIDIA Tegra device tree bindings -------------------------------------------- - -SoCs -------------------------------------------- - -Each device tree must specify which Tegra SoC it uses, using one of the -following compatible values: - - nvidia,tegra20 - nvidia,tegra30 - nvidia,tegra114 - nvidia,tegra124 - nvidia,tegra132 - nvidia,tegra210 - nvidia,tegra186 - nvidia,tegra194 - -Boards -------------------------------------------- - -Each device tree must specify which one or more of the following -board-specific compatible values: - - ad,medcom-wide - ad,plutux - ad,tamonten - ad,tec - compal,paz00 - compulab,trimslice - nvidia,beaver - nvidia,cardhu - nvidia,cardhu-a02 - nvidia,cardhu-a04 - nvidia,dalmore - nvidia,harmony - nvidia,jetson-tk1 - nvidia,norrin - nvidia,p2371-0000 - nvidia,p2371-2180 - nvidia,p2571 - nvidia,p2771-0000 - nvidia,p2972-0000 - nvidia,roth - nvidia,seaboard - nvidia,tn7 - nvidia,ventana - toradex,apalis_t30 - toradex,apalis_t30-eval - toradex,apalis_t30-v1.1 - toradex,apalis_t30-v1.1-eval - toradex,apalis-tk1 - toradex,apalis-tk1-eval - toradex,apalis-tk1-v1.2 - toradex,apalis-tk1-v1.2-eval - toradex,colibri_t20 - toradex,colibri_t20-eval-v3 - toradex,colibri_t20-iris - toradex,colibri_t30 - toradex,colibri_t30-eval-v3 - -Trusted Foundations -------------------------------------------- -Tegra supports the Trusted Foundation secure monitor. See the -"tlm,trusted-foundations" binding's documentation for more details. diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml b/Documentation/devicetree/bindings/arm/tegra.yaml new file mode 100644 index 000000000000..fbcde8a7e067 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/tegra.yaml @@ -0,0 +1,101 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/tegra.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra device tree bindings + +maintainers: + - Thierry Reding <thierry.reding@gmail.com> + - Jonathan Hunter <jonathanh@nvidia.com> + +properties: + compatible: + oneOf: + - items: + - enum: + - compal,paz00 + - compulab,trimslice + - nvidia,harmony + - nvidia,seaboard + - nvidia,ventana + - const: nvidia,tegra20 + - items: + - enum: + - ad,medcom-wide + - ad,plutux + - ad,tec + - const: ad,tamonten + - const: nvidia,tegra20 + - items: + - enum: + - toradex,colibri_t20-eval-v3 + - toradex,colibri_t20-iris + - const: toradex,colibri_t20 + - const: nvidia,tegra20 + - items: + - enum: + - nvidia,beaver + - const: nvidia,tegra30 + - items: + - enum: + - nvidia,cardhu-a02 + - nvidia,cardhu-a04 + - const: nvidia,cardhu + - const: nvidia,tegra30 + - items: + - const: toradex,apalis_t30-eval + - const: toradex,apalis_t30 + - const: nvidia,tegra30 + - items: + - const: toradex,apalis_t30-eval-v1.1 + - const: toradex,apalis_t30-eval + - const: toradex,apalis_t30-v1.1 + - const: toradex,apalis_t30 + - const: nvidia,tegra30 + - items: + - enum: + - toradex,colibri_t30-eval-v3 + - const: toradex,colibri_t30 + - const: nvidia,tegra30 + - items: + - enum: + - nvidia,dalmore + - nvidia,roth + - nvidia,tn7 + - const: nvidia,tegra114 + - items: + - enum: + - nvidia,jetson-tk1 + - nvidia,venice2 + - const: nvidia,tegra124 + - items: + - const: toradex,apalis-tk1-eval + - const: toradex,apalis-tk1 + - const: nvidia,tegra124 + - items: + - const: toradex,apalis-tk1-v1.2-eval + - const: toradex,apalis-tk1-eval + - const: toradex,apalis-tk1-v1.2 + - const: toradex,apalis-tk1 + - const: nvidia,tegra124 + - items: + - enum: + - nvidia,norrin + - const: nvidia,tegra132 + - const: nvidia,tegra124 + - items: + - enum: + - nvidia,p2371-0000 + - nvidia,p2371-2180 + - nvidia,p2571 + - const: nvidia,tegra210 + - items: + - enum: + - nvidia,p2771-0000 + - const: nvidia,tegra186 + - items: + - enum: + - nvidia,p2972-0000 + - const: nvidia,tegra194 diff --git a/Documentation/devicetree/bindings/arm/ti/nspire.yaml b/Documentation/devicetree/bindings/arm/ti/nspire.yaml new file mode 100644 index 000000000000..e372b43da62f --- /dev/null +++ b/Documentation/devicetree/bindings/arm/ti/nspire.yaml @@ -0,0 +1,24 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/ti/nspire.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI-NSPIRE calculators + +maintainers: + - Daniel Tang <dt.tangr@gmail.com> + +properties: + $nodename: + const: '/' + compatible: + items: + - enum: + # CX models + - ti,nspire-cx + # Touchpad models + - ti,nspire-tp + # Clickpad models + - ti,nspire-clp +... diff --git a/Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml b/Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml new file mode 100644 index 000000000000..4326d2cfa15d --- /dev/null +++ b/Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml @@ -0,0 +1,26 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/ti/davinci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments DaVinci Platforms Device Tree Bindings + +maintainers: + - Sekhar Nori <nsekhar@ti.com> + +description: + DA850/OMAP-L138/AM18x based boards + +properties: + $nodename: + const: '/' + compatible: + items: + - enum: + - ti,da850-evm # DA850/OMAP-L138/AM18x Evaluation Module (EVM) board + - ti,da850-lcdk # DA850/OMAP-L138/AM18x L138/C6748 Development Kit (LCDK) board + - enbw,cmc # EnBW AM1808 based CMC board + - lego,ev3 # LEGO MINDSTORMS EV3 (AM1808 based) + - const: ti,da850 +... diff --git a/Documentation/devicetree/bindings/arm/vt8500.txt b/Documentation/devicetree/bindings/arm/vt8500.txt deleted file mode 100644 index 87dc1ddf4770..000000000000 --- a/Documentation/devicetree/bindings/arm/vt8500.txt +++ /dev/null @@ -1,22 +0,0 @@ -VIA/Wondermedia VT8500 Platforms Device Tree Bindings ---------------------------------------- - -Boards with the VIA VT8500 SoC shall have the following properties: -Required root node property: -compatible = "via,vt8500"; - -Boards with the Wondermedia WM8505 SoC shall have the following properties: -Required root node property: -compatible = "wm,wm8505"; - -Boards with the Wondermedia WM8650 SoC shall have the following properties: -Required root node property: -compatible = "wm,wm8650"; - -Boards with the Wondermedia WM8750 SoC shall have the following properties: -Required root node property: -compatible = "wm,wm8750"; - -Boards with the Wondermedia WM8850 SoC shall have the following properties: -Required root node property: -compatible = "wm,wm8850"; diff --git a/Documentation/devicetree/bindings/arm/vt8500.yaml b/Documentation/devicetree/bindings/arm/vt8500.yaml new file mode 100644 index 000000000000..7b25b6fa34e9 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/vt8500.yaml @@ -0,0 +1,23 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/vt8500.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: VIA/Wondermedia VT8500 Platforms Device Tree Bindings + +maintainers: + - Tony Prisk <linux@prisktech.co.nz> +description: test + +properties: + $nodename: + const: '/' + compatible: + items: + - enum: + - via,vt8500 + - wm,wm8505 + - wm,wm8650 + - wm,wm8750 + - wm,wm8850 diff --git a/Documentation/devicetree/bindings/arm/xilinx.txt b/Documentation/devicetree/bindings/arm/xilinx.txt deleted file mode 100644 index 26fe5ecc4332..000000000000 --- a/Documentation/devicetree/bindings/arm/xilinx.txt +++ /dev/null @@ -1,83 +0,0 @@ -Xilinx Zynq Platforms Device Tree Bindings - -Boards with Zynq-7000 SOC based on an ARM Cortex A9 processor -shall have the following properties. - -Required root node properties: - - compatible = "xlnx,zynq-7000"; - -Additional compatible strings: - -- Adapteva Parallella board - "adapteva,parallella" - -- Avnet MicroZed board - "avnet,zynq-microzed" - "xlnx,zynq-microzed" - -- Avnet ZedBoard board - "avnet,zynq-zed" - "xlnx,zynq-zed" - -- Digilent Zybo board - "digilent,zynq-zybo" - -- Digilent Zybo Z7 board - "digilent,zynq-zybo-z7" - -- Xilinx CC108 internal board - "xlnx,zynq-cc108" - -- Xilinx ZC702 internal board - "xlnx,zynq-zc702" - -- Xilinx ZC706 internal board - "xlnx,zynq-zc706" - -- Xilinx ZC770 internal board, with different FMC cards - "xlnx,zynq-zc770-xm010" - "xlnx,zynq-zc770-xm011" - "xlnx,zynq-zc770-xm012" - "xlnx,zynq-zc770-xm013" - ---------------------------------------------------------------- - -Xilinx Zynq UltraScale+ MPSoC Platforms Device Tree Bindings - -Boards with ZynqMP SOC based on an ARM Cortex A53 processor -shall have the following properties. - -Required root node properties: - - compatible = "xlnx,zynqmp"; - - -Additional compatible strings: - -- Xilinx internal board zc1232 - "xlnx,zynqmp-zc1232-revA", "xlnx,zynqmp-zc1232" - -- Xilinx internal board zc1254 - "xlnx,zynqmp-zc1254-revA", "xlnx,zynqmp-zc1254" - -- Xilinx internal board zc1275 - "xlnx,zynqmp-zc1275-revA", "xlnx,zynqmp-zc1275" - -- Xilinx internal board zc1751 - "xlnx,zynqmp-zc1751" - -- Xilinx 96boards compatible board zcu100 - "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100" - -- Xilinx evaluation board zcu102 - "xlnx,zynqmp-zcu102-revA", "xlnx,zynqmp-zcu102" - "xlnx,zynqmp-zcu102-revB", "xlnx,zynqmp-zcu102" - "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102" - -- Xilinx evaluation board zcu104 - "xlnx,zynqmp-zcu104-revA", "xlnx,zynqmp-zcu104" - -- Xilinx evaluation board zcu106 - "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106" - -- Xilinx evaluation board zcu111 - "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111" diff --git a/Documentation/devicetree/bindings/arm/xilinx.yaml b/Documentation/devicetree/bindings/arm/xilinx.yaml new file mode 100644 index 000000000000..c73b1f5c7f49 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/xilinx.yaml @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/xilinx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx Zynq Platforms Device Tree Bindings + +maintainers: + - Michal Simek <michal.simek@xilinx.com> + +description: | + Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - adapteva,parallella + - digilent,zynq-zybo + - digilent,zynq-zybo-z7 + - xlnx,zynq-cc108 + - xlnx,zynq-zc702 + - xlnx,zynq-zc706 + - xlnx,zynq-zc770-xm010 + - xlnx,zynq-zc770-xm011 + - xlnx,zynq-zc770-xm012 + - xlnx,zynq-zc770-xm013 + - const: xlnx,zynq-7000 + + - items: + - const: avnet,zynq-microzed + - const: xlnx,zynq-microzed + - const: xlnx,zynq-7000 + + - items: + - const: avnet,zynq-zed + - const: xlnx,zynq-zed + - const: xlnx,zynq-7000 + + - items: + - enum: + - xlnx,zynqmp-zc1751 + - const: xlnx,zynqmp + + - description: Xilinx internal board zc1232 + items: + - const: xlnx,zynqmp-zc1232-revA + - const: xlnx,zynqmp-zc1232 + - const: xlnx,zynqmp + + - description: Xilinx internal board zc1254 + items: + - const: xlnx,zynqmp-zc1254-revA + - const: xlnx,zynqmp-zc1254 + - const: xlnx,zynqmp + + - description: Xilinx internal board zc1275 + items: + - const: xlnx,zynqmp-zc1275-revA + - const: xlnx,zynqmp-zc1275 + - const: xlnx,zynqmp + + - description: Xilinx 96boards compatible board zcu100 + items: + - const: xlnx,zynqmp-zcu100-revC + - const: xlnx,zynqmp-zcu100 + - const: xlnx,zynqmp + + - description: Xilinx 96boards compatible board Ultra96 + items: + - const: avnet,ultra96-rev1 + - const: avnet,ultra96 + - const: xlnx,zynqmp-zcu100-revC + - const: xlnx,zynqmp-zcu100 + - const: xlnx,zynqmp + + - description: Xilinx evaluation board zcu102 + items: + - enum: + - xlnx,zynqmp-zcu102-revA + - xlnx,zynqmp-zcu102-revB + - xlnx,zynqmp-zcu102-rev1.0 + - const: xlnx,zynqmp-zcu102 + - const: xlnx,zynqmp + + - description: Xilinx evaluation board zcu104 + items: + - enum: + - xlnx,zynqmp-zcu104-revA + - xlnx,zynqmp-zcu104-rev1.0 + - const: xlnx,zynqmp-zcu104 + - const: xlnx,zynqmp + + - description: Xilinx evaluation board zcu106 + items: + - enum: + - xlnx,zynqmp-zcu106-revA + - xlnx,zynqmp-zcu106-rev1.0 + - const: xlnx,zynqmp-zcu106 + - const: xlnx,zynqmp + + - description: Xilinx evaluation board zcu111 + items: + - enum: + - xlnx,zynqmp-zcu111-revA + - xlnx,zynqmp-zcu11-rev1.0 + - const: xlnx,zynqmp-zcu111 + - const: xlnx,zynqmp + +... diff --git a/Documentation/devicetree/bindings/arm/zte.txt b/Documentation/devicetree/bindings/arm/zte.txt deleted file mode 100644 index 340612794a37..000000000000 --- a/Documentation/devicetree/bindings/arm/zte.txt +++ /dev/null @@ -1,14 +0,0 @@ -ZTE platforms device tree bindings - ---------------------------------------- -- ZX296702 board: - Required root node properties: - - compatible = "zte,zx296702-ad1", "zte,zx296702" - ---------------------------------------- -- ZX296718 SoC: - Required root node properties: - - compatible = "zte,zx296718" - -ZX296718 EVB board: - - "zte,zx296718-evb" diff --git a/Documentation/devicetree/bindings/arm/zte.yaml b/Documentation/devicetree/bindings/arm/zte.yaml new file mode 100644 index 000000000000..2d3fefdccdff --- /dev/null +++ b/Documentation/devicetree/bindings/arm/zte.yaml @@ -0,0 +1,26 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/zte.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ZTE platforms device tree bindings + +maintainers: + - Jun Nie <jun.nie@linaro.org> + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - zte,zx296702-ad1 + - const: zte,zx296702 + - items: + - enum: + - zte,zx296718-evb + - const: zte,zx296718 + +... diff --git a/Documentation/devicetree/bindings/example-schema.yaml b/Documentation/devicetree/bindings/example-schema.yaml new file mode 100644 index 000000000000..9175d67f355d --- /dev/null +++ b/Documentation/devicetree/bindings/example-schema.yaml @@ -0,0 +1,170 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2018 Linaro Ltd. +%YAML 1.2 +--- +# All the top-level keys are standard json-schema keywords except for +# 'maintainers' and 'select' + +# $id is a unique idenifier based on the filename. There may or may not be a +# file present at the URL. +$id: "http://devicetree.org/schemas/example-schema.yaml#" +# $schema is the meta-schema this schema should be validated with. +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: An example schema annotated with jsonschema details + +maintainers: + - Rob Herring <robh@kernel.org> + +description: | + A more detailed multi-line description of the binding. + + Details about the hardware device and any links to datasheets can go here. + + Literal blocks are marked with the '|' at the beginning. The end is marked by + indentation less than the first line of the literal block. Lines also cannot + begin with a tab character. + +select: false + # 'select' is a schema applied to a DT node to determine if this binding + # schema should be applied to the node. It is optional and by default the + # possible compatible strings are extracted and used to match. + + # In this case, a 'false' schema will never match. + +properties: + # A dictionary of DT properties for this binding schema + compatible: + # More complicated schema can use oneOf (XOR), anyOf (OR), or allOf (AND) + # to handle different conditions. + # In this case, it's needed to handle a variable number of values as there + # isn't another way to express a constraint of the last string value. + # The boolean schema must be a list of schemas. + oneOf: + - items: + # items is a list of possible values for the property. The number of + # values is determined by the number of elements in the list. + # Order in lists is significant, order in dicts is not + # Must be one of the 1st enums followed by the 2nd enum + # + # Each element in items should be 'enum' or 'const' + - enum: + - vendor,soc4-ip + - vendor,soc3-ip + - vendor,soc2-ip + - enum: + - vendor,soc1-ip + # additionalItems being false is implied + # minItems/maxItems equal to 2 is implied + - items: + # 'const' is just a special case of an enum with a single possible value + - const: vendor,soc1-ip + + reg: + # The core schema already checks that reg values are numbers, so device + # specific schema don't need to do those checks. + # The description of each element defines the order and implicitly defines + # the number of reg entries. + items: + - description: core registers + - description: aux registers + # minItems/maxItems equal to 2 is implied + + reg-names: + # The core schema enforces this is a string array + items: + - const: core + - const: aux + + clocks: + # Cases that have only a single entry just need to express that with maxItems + maxItems: 1 + description: bus clock + + clock-names: + items: + - const: bus + + interrupts: + # Either 1 or 2 interrupts can be present + minItems: 1 + maxItems: 2 + items: + - description: tx or combined interrupt + - description: rx interrupt + description: + A variable number of interrupts warrants a description of what conditions + affect the number of interrupts. Otherwise, descriptions on standard + properties are not necessary. + + interrupt-names: + # minItems must be specified here because the default would be 2 + minItems: 1 + maxItems: 2 + items: + - const: tx irq + - const: rx irq + + # Property names starting with '#' must be quoted + '#interrupt-cells': + # A simple case where the value must always be '2'. + # The core schema handles that this must be a single integer. + const: 2 + + interrupt-controller: true + # The core checks this is a boolean, so just have to list it here to be + # valid for this binding. + + clock-frequency: + # The type is set in the core schema. Per device schema only need to set + # constraints on the possible values. + minimum: 100 + maximum: 400000 + # The value that should be used if the property is not present + default: 200 + + foo-gpios: + maxItems: 1 + description: A connection of the 'foo' gpio line. + + vendor,int-property: + description: Vendor specific properties must have a description + # 'allOf' is the json-schema way of subclassing a schema. Here the base + # type schema is referenced and then additional constraints on the values + # are added. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [2, 4, 6, 8, 10] + + vendor,bool-property: + description: Vendor specific properties must have a description + # boolean properties is one case where the json-schema 'type' keyword + # can be used directly + type: boolean + + vendor,string-array-property: + description: Vendor specific properties should reference a type in the + core schema. + allOf: + - $ref: /schemas/types.yaml#/definitions/string-array + - items: + - enum: [ foo, bar ] + - enum: [ baz, boo ] + +required: + - compatible + - reg + - interrupts + - interrupt-controller + +examples: + # Examples are now compiled with dtc + - | + node@1000 { + compatible = "vendor,soc4-ip", "vendor,soc1-ip"; + reg = <0x1000 0x80>, + <0x3000 0x80>; + reg-names = "core", "aux"; + interrupts = <10>; + interrupt-controller; + }; diff --git a/Documentation/devicetree/bindings/gpio/gpio-omap.txt b/Documentation/devicetree/bindings/gpio/gpio-omap.txt index 8d950522e7fa..e57b2cb28f6c 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-omap.txt +++ b/Documentation/devicetree/bindings/gpio/gpio-omap.txt @@ -5,6 +5,8 @@ Required properties: - "ti,omap2-gpio" for OMAP2 controllers - "ti,omap3-gpio" for OMAP3 controllers - "ti,omap4-gpio" for OMAP4 controllers +- reg : Physical base address of the controller and length of memory mapped + region. - gpio-controller : Marks the device node as a GPIO controller. - #gpio-cells : Should be two. - first cell is the pin number @@ -18,6 +20,8 @@ Required properties: 2 = high-to-low edge triggered. 4 = active high level-sensitive. 8 = active low level-sensitive. +- interrupts : The interrupt the controller is rising as output when an + interrupt occures OMAP specific properties: - ti,hwmods: Name of the hwmod associated to the GPIO: @@ -29,11 +33,13 @@ OMAP specific properties: Example: -gpio4: gpio4 { +gpio0: gpio@44e07000 { compatible = "ti,omap4-gpio"; - ti,hwmods = "gpio4"; + reg = <0x44e07000 0x1000>; + ti,hwmods = "gpio1"; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + interrupts = <96>; }; diff --git a/Documentation/devicetree/bindings/i2c/i2c-gpio.txt b/Documentation/devicetree/bindings/i2c/i2c-gpio.txt deleted file mode 100644 index 38a05562d1d2..000000000000 --- a/Documentation/devicetree/bindings/i2c/i2c-gpio.txt +++ /dev/null @@ -1,46 +0,0 @@ -Device-Tree bindings for i2c gpio driver - -Required properties: - - compatible = "i2c-gpio"; - - sda-gpios: gpio used for the sda signal, this should be flagged as - active high using open drain with (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) - from <dt-bindings/gpio/gpio.h> since the signal is by definition - open drain. - - scl-gpios: gpio used for the scl signal, this should be flagged as - active high using open drain with (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) - from <dt-bindings/gpio/gpio.h> since the signal is by definition - open drain. - -Optional properties: - - i2c-gpio,scl-output-only: scl as output only - - i2c-gpio,delay-us: delay between GPIO operations (may depend on each platform) - - i2c-gpio,timeout-ms: timeout to get data - -Deprecated properties, do not use in new device tree sources: - - gpios: sda and scl gpio, alternative for {sda,scl}-gpios - - i2c-gpio,sda-open-drain: this means that something outside of our - control has put the GPIO line used for SDA into open drain mode, and - that something is not the GPIO chip. It is essentially an - inconsistency flag. - - i2c-gpio,scl-open-drain: this means that something outside of our - control has put the GPIO line used for SCL into open drain mode, and - that something is not the GPIO chip. It is essentially an - inconsistency flag. - -Example nodes: - -#include <dt-bindings/gpio/gpio.h> - -i2c@0 { - compatible = "i2c-gpio"; - sda-gpios = <&pioA 23 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; - scl-gpios = <&pioA 24 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; - i2c-gpio,delay-us = <2>; /* ~100 kHz */ - #address-cells = <1>; - #size-cells = <0>; - - rv3029c2@56 { - compatible = "rv3029c2"; - reg = <0x56>; - }; -}; diff --git a/Documentation/devicetree/bindings/i2c/i2c-gpio.yaml b/Documentation/devicetree/bindings/i2c/i2c-gpio.yaml new file mode 100644 index 000000000000..da6129090a8e --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-gpio.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/i2c-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bindings for GPIO bitbanged I2C + +maintainers: + - Wolfram Sang <wolfram@the-dreams.de> + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + items: + - const: i2c-gpio + + sda-gpios: + description: + gpio used for the sda signal, this should be flagged as + active high using open drain with (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) + from <dt-bindings/gpio/gpio.h> since the signal is by definition + open drain. + maxItems: 1 + + scl-gpios: + description: + gpio used for the scl signal, this should be flagged as + active high using open drain with (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) + from <dt-bindings/gpio/gpio.h> since the signal is by definition + open drain. + maxItems: 1 + + i2c-gpio,scl-output-only: + description: scl as output only + type: boolean + + i2c-gpio,delay-us: + description: delay between GPIO operations (may depend on each platform) + $ref: /schemas/types.yaml#/definitions/uint32 + + i2c-gpio,timeout-ms: + description: timeout to get data + $ref: /schemas/types.yaml#/definitions/uint32 + + # Deprecated properties, do not use in new device tree sources: + gpios: + minItems: 2 + maxItems: 2 + description: sda and scl gpio, alternative for {sda,scl}-gpios + + i2c-gpio,sda-open-drain: + # Generate a warning if present + not: true + description: this means that something outside of our control has put + the GPIO line used for SDA into open drain mode, and that something is + not the GPIO chip. It is essentially an inconsistency flag. + + i2c-gpio,scl-open-drain: + # Generate a warning if present + not: true + description: this means that something outside of our control has put the + GPIO line used for SCL into open drain mode, and that something is not + the GPIO chip. It is essentially an inconsistency flag. + +required: + - compatible + - sda-gpios + - scl-gpios + +... diff --git a/Documentation/devicetree/bindings/iio/magnetometer/mag3110.txt b/Documentation/devicetree/bindings/iio/magnetometer/mag3110.txt new file mode 100644 index 000000000000..bdd40bcaaa1f --- /dev/null +++ b/Documentation/devicetree/bindings/iio/magnetometer/mag3110.txt @@ -0,0 +1,27 @@ +* FREESCALE MAG3110 magnetometer sensor + +Required properties: + + - compatible : should be "fsl,mag3110" + - reg : the I2C address of the magnetometer + +Optional properties: + + - interrupts: the sole interrupt generated by the device + + Refer to interrupt-controller/interrupts.txt for generic interrupt client + node bindings. + + - vdd-supply: phandle to the regulator that provides power to the sensor. + - vddio-supply: phandle to the regulator that provides power to the sensor's IO. + +Example: + +magnetometer@e { + compatible = "fsl,mag3110"; + reg = <0x0e>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3_mag3110_int>; + interrupt-parent = <&gpio3>; + interrupts = <16 IRQ_TYPE_EDGE_RISING>; +}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt b/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt index 8b53273cb22f..608fee15a4cf 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt @@ -5,7 +5,7 @@ Required properties: "mrvl,mmp2-mux-intc" - reg : Address and length of the register set of the interrupt controller. If the interrupt controller is intc, address and length means the range - of the whold interrupt controller. If the interrupt controller is mux-intc, + of the whole interrupt controller. If the interrupt controller is mux-intc, address and length means one register. Since address of mux-intc is in the range of intc. mux-intc is secondary interrupt controller. - reg-names : Name of the register set of the interrupt controller. It's diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-sierra.txt b/Documentation/devicetree/bindings/phy/phy-cadence-sierra.txt new file mode 100644 index 000000000000..6e1b47bfce43 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-cadence-sierra.txt @@ -0,0 +1,67 @@ +Cadence Sierra PHY +----------------------- + +Required properties: +- compatible: cdns,sierra-phy-t0 +- clocks: Must contain an entry in clock-names. + See ../clocks/clock-bindings.txt for details. +- clock-names: Must be "phy_clk" +- resets: Must contain an entry for each in reset-names. + See ../reset/reset.txt for details. +- reset-names: Must include "sierra_reset" and "sierra_apb". + "sierra_reset" must control the reset line to the PHY. + "sierra_apb" must control the reset line to the APB PHY + interface. +- reg: register range for the PHY. +- #address-cells: Must be 1 +- #size-cells: Must be 0 + +Optional properties: +- cdns,autoconf: A boolean property whose presence indicates that the + PHY registers will be configured by hardware. If not + present, all sub-node optional properties must be + provided. + +Sub-nodes: + Each group of PHY lanes with a single master lane should be represented as + a sub-node. Note that the actual configuration of each lane is determined by + hardware strapping, and must match the configuration specified here. + +Sub-node required properties: +- #phy-cells: Generic PHY binding; must be 0. +- reg: The master lane number. This is the lowest numbered lane + in the lane group. +- resets: Must contain one entry which controls the reset line for the + master lane of the sub-node. + See ../reset/reset.txt for details. + +Sub-node optional properties: +- cdns,num-lanes: Number of lanes in this group. From 1 to 4. The + group is made up of consecutive lanes. +- cdns,phy-type: Can be PHY_TYPE_PCIE or PHY_TYPE_USB3, depending on + configuration of lanes. + +Example: + pcie_phy4: pcie-phy@fd240000 { + compatible = "cdns,sierra-phy-t0"; + reg = <0x0 0xfd240000 0x0 0x40000>; + resets = <&phyrst 0>, <&phyrst 1>; + reset-names = "sierra_reset", "sierra_apb"; + clocks = <&phyclock>; + clock-names = "phy_clk"; + #address-cells = <1>; + #size-cells = <0>; + pcie0_phy0: pcie-phy@0 { + reg = <0>; + resets = <&phyrst 2>; + cdns,num-lanes = <2>; + #phy-cells = <0>; + cdns,phy-type = <PHY_TYPE_PCIE>; + }; + pcie0_phy1: pcie-phy@2 { + reg = <2>; + resets = <&phyrst 4>; + cdns,num-lanes = <1>; + #phy-cells = <0>; + cdns,phy-type = <PHY_TYPE_PCIE>; + }; diff --git a/Documentation/devicetree/bindings/reserved-memory/xen,shared-memory.txt b/Documentation/devicetree/bindings/reserved-memory/xen,shared-memory.txt new file mode 100644 index 000000000000..d483a2103d70 --- /dev/null +++ b/Documentation/devicetree/bindings/reserved-memory/xen,shared-memory.txt @@ -0,0 +1,24 @@ +* Xen hypervisor reserved-memory binding + +Expose one or more memory regions as reserved-memory to the guest +virtual machine. Typically, a region is configured at VM creation time +to be a shared memory area across multiple virtual machines for +communication among them. + +For each of these pre-shared memory regions, a range is exposed under +the /reserved-memory node as a child node. Each range sub-node is named +xen-shmem@<address> and has the following properties: + +- compatible: + compatible = "xen,shared-memory-v1" + +- reg: + the base guest physical address and size of the shared memory region + +- xen,offset: (borrower VMs only) + 64 bit integer offset within the owner virtual machine's shared + memory region used for the mapping in the borrower VM. + +- xen,id: + a string that identifies the shared memory region as specified in + the VM config file diff --git a/Documentation/devicetree/bindings/rng/mtk-rng.txt b/Documentation/devicetree/bindings/rng/mtk-rng.txt index 366b99bff8cd..2bc89f133701 100644 --- a/Documentation/devicetree/bindings/rng/mtk-rng.txt +++ b/Documentation/devicetree/bindings/rng/mtk-rng.txt @@ -1,9 +1,10 @@ Device-Tree bindings for Mediatek random number generator -found in Mediatek SoC family +found in MediaTek SoC family Required properties: - compatible : Should be "mediatek,mt7622-rng", "mediatek,mt7623-rng" : for MT7622 + "mediatek,mt7629-rng", "mediatek,mt7623-rng" : for MT7629 "mediatek,mt7623-rng" : for MT7623 - clocks : list of clock specifiers, corresponding to entries in clock-names property; diff --git a/Documentation/devicetree/bindings/rtc/rtc.txt b/Documentation/devicetree/bindings/rtc/rtc.txt new file mode 100644 index 000000000000..7c8da6926095 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/rtc.txt @@ -0,0 +1,64 @@ +Generic device tree bindings for Real Time Clock devices +======================================================== + +This document describes generic bindings which can be used to describe Real Time +Clock devices in a device tree. + +Required properties +------------------- + +- compatible : name of RTC device following generic names recommended practice. + +For other required properties e.g. to describe register sets, +clocks, etc. check the binding documentation of the specific driver. + +Optional properties +------------------- + +- start-year : if provided, the default hardware range supported by the RTC is + shifted so the first usable year is the specified one. + +The following properties may not be supported by all drivers. However, if a +driver wants to support one of the below features, it should adapt the bindings +below. +- trickle-resistor-ohms : Selected resistor for trickle charger. Should be given + if trickle charger should be enabled +- trickle-diode-disable : Do not use internal trickle charger diode Should be + given if internal trickle charger diode should be + disabled +- wakeup-source : Enables wake up of host system on alarm + +Trivial RTCs +------------ + +This is a list of trivial RTC devices that have simple device tree +bindings, consisting only of a compatible field, an address and +possibly an interrupt line. + + +Compatible Vendor / Chip +========== ============= +abracon,abb5zes3 AB-RTCMC-32.768kHz-B5ZE-S3: Real Time Clock/Calendar Module with I2C Interface +dallas,ds1374 I2C, 32-Bit Binary Counter Watchdog RTC with Trickle Charger and Reset Input/Output +dallas,ds1672 Dallas DS1672 Real-time Clock +dallas,ds3232 Extremely Accurate I²C RTC with Integrated Crystal and SRAM +epson,rx8010 I2C-BUS INTERFACE REAL TIME CLOCK MODULE +epson,rx8581 I2C-BUS INTERFACE REAL TIME CLOCK MODULE +emmicro,em3027 EM Microelectronic EM3027 Real-time Clock +isil,isl1208 Intersil ISL1208 Low Power RTC with Battery Backed SRAM +isil,isl1218 Intersil ISL1218 Low Power RTC with Battery Backed SRAM +isil,isl12022 Intersil ISL12022 Real-time Clock +microcrystal,rv3029 Real Time Clock Module with I2C-Bus +nxp,pcf2127 Real-time clock +nxp,pcf2129 Real-time clock +nxp,pcf8523 Real-time Clock +nxp,pcf8563 Real-time clock/calendar +nxp,pcf85063 Tiny Real-Time Clock +pericom,pt7c4338 Real-time Clock Module +ricoh,r2025sd I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC +ricoh,r2221tl I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC +ricoh,rs5c372a I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC +ricoh,rs5c372b I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC +ricoh,rv5c386 I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC +ricoh,rv5c387a I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC +sii,s35390a 2-wire CMOS real-time clock diff --git a/Documentation/devicetree/bindings/timer/arm,arch_timer.txt b/Documentation/devicetree/bindings/timer/arm,arch_timer.txt deleted file mode 100644 index 68301b77e854..000000000000 --- a/Documentation/devicetree/bindings/timer/arm,arch_timer.txt +++ /dev/null @@ -1,112 +0,0 @@ -* ARM architected timer - -ARM cores may have a per-core architected timer, which provides per-cpu timers, -or a memory mapped architected timer, which provides up to 8 frames with a -physical and optional virtual timer per frame. - -The per-core architected timer is attached to a GIC to deliver its -per-processor interrupts via PPIs. The memory mapped timer is attached to a GIC -to deliver its interrupts via SPIs. - -** CP15 Timer node properties: - -- compatible : Should at least contain one of - "arm,armv7-timer" - "arm,armv8-timer" - -- interrupts : Interrupt list for secure, non-secure, virtual and - hypervisor timers, in that order. - -- clock-frequency : The frequency of the main counter, in Hz. Should be present - only where necessary to work around broken firmware which does not configure - CNTFRQ on all CPUs to a uniform correct value. Use of this property is - strongly discouraged; fix your firmware unless absolutely impossible. - -- always-on : a boolean property. If present, the timer is powered through an - always-on power domain, therefore it never loses context. - -- fsl,erratum-a008585 : A boolean property. Indicates the presence of - QorIQ erratum A-008585, which says that reading the counter is - unreliable unless the same value is returned by back-to-back reads. - This also affects writes to the tval register, due to the implicit - counter read. - -- hisilicon,erratum-161010101 : A boolean property. Indicates the - presence of Hisilicon erratum 161010101, which says that reading the - counters is unreliable in some cases, and reads may return a value 32 - beyond the correct value. This also affects writes to the tval - registers, due to the implicit counter read. - -** Optional properties: - -- arm,cpu-registers-not-fw-configured : Firmware does not initialize - any of the generic timer CPU registers, which contain their - architecturally-defined reset values. Only supported for 32-bit - systems which follow the ARMv7 architected reset values. - -- arm,no-tick-in-suspend : The main counter does not tick when the system is in - low-power system suspend on some SoCs. This behavior does not match the - Architecture Reference Manual's specification that the system counter "must - be implemented in an always-on power domain." - - -Example: - - timer { - compatible = "arm,cortex-a15-timer", - "arm,armv7-timer"; - interrupts = <1 13 0xf08>, - <1 14 0xf08>, - <1 11 0xf08>, - <1 10 0xf08>; - clock-frequency = <100000000>; - }; - -** Memory mapped timer node properties: - -- compatible : Should at least contain "arm,armv7-timer-mem". - -- clock-frequency : The frequency of the main counter, in Hz. Should be present - only when firmware has not configured the MMIO CNTFRQ registers. - -- reg : The control frame base address. - -Note that #address-cells, #size-cells, and ranges shall be present to ensure -the CPU can address a frame's registers. - -A timer node has up to 8 frame sub-nodes, each with the following properties: - -- frame-number: 0 to 7. - -- interrupts : Interrupt list for physical and virtual timers in that order. - The virtual timer interrupt is optional. - -- reg : The first and second view base addresses in that order. The second view - base address is optional. - -- status : "disabled" indicates the frame is not available for use. Optional. - -Example: - - timer@f0000000 { - compatible = "arm,armv7-timer-mem"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - reg = <0xf0000000 0x1000>; - clock-frequency = <50000000>; - - frame@f0001000 { - frame-number = <0> - interrupts = <0 13 0x8>, - <0 14 0x8>; - reg = <0xf0001000 0x1000>, - <0xf0002000 0x1000>; - }; - - frame@f0003000 { - frame-number = <1> - interrupts = <0 15 0x8>; - reg = <0xf0003000 0x1000>; - }; - }; diff --git a/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml b/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml new file mode 100644 index 000000000000..6deead07728e --- /dev/null +++ b/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml @@ -0,0 +1,103 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/arm,arch_timer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM architected timer + +maintainers: + - Marc Zyngier <marc.zyngier@arm.com> + - Mark Rutland <mark.rutland@arm.com> +description: |+ + ARM cores may have a per-core architected timer, which provides per-cpu timers, + or a memory mapped architected timer, which provides up to 8 frames with a + physical and optional virtual timer per frame. + + The per-core architected timer is attached to a GIC to deliver its + per-processor interrupts via PPIs. The memory mapped timer is attached to a GIC + to deliver its interrupts via SPIs. + +properties: + compatible: + oneOf: + - items: + - enum: + - arm,cortex-a15-timer + - enum: + - arm,armv7-timer + - items: + - enum: + - arm,armv7-timer + - items: + - enum: + - arm,armv8-timer + + interrupts: + items: + - description: secure timer irq + - description: non-secure timer irq + - description: virtual timer irq + - description: hypervisor timer irq + + clock-frequency: + description: The frequency of the main counter, in Hz. Should be present + only where necessary to work around broken firmware which does not configure + CNTFRQ on all CPUs to a uniform correct value. Use of this property is + strongly discouraged; fix your firmware unless absolutely impossible. + + always-on: + type: boolean + description: If present, the timer is powered through an always-on power + domain, therefore it never loses context. + + fsl,erratum-a008585: + type: boolean + description: Indicates the presence of QorIQ erratum A-008585, which says + that reading the counter is unreliable unless the same value is returned + by back-to-back reads. This also affects writes to the tval register, due + to the implicit counter read. + + hisilicon,erratum-161010101: + type: boolean + description: Indicates the presence of Hisilicon erratum 161010101, which + says that reading the counters is unreliable in some cases, and reads may + return a value 32 beyond the correct value. This also affects writes to + the tval registers, due to the implicit counter read. + + arm,cpu-registers-not-fw-configured: + type: boolean + description: Firmware does not initialize any of the generic timer CPU + registers, which contain their architecturally-defined reset values. Only + supported for 32-bit systems which follow the ARMv7 architected reset + values. + + arm,no-tick-in-suspend: + type: boolean + description: The main counter does not tick when the system is in + low-power system suspend on some SoCs. This behavior does not match the + Architecture Reference Manual's specification that the system counter "must + be implemented in an always-on power domain." + +required: + - compatible + +oneOf: + - required: + - interrupts + - required: + - interrupts-extended + +examples: + - | + timer { + compatible = "arm,cortex-a15-timer", + "arm,armv7-timer"; + interrupts = <1 13 0xf08>, + <1 14 0xf08>, + <1 11 0xf08>, + <1 10 0xf08>; + clock-frequency = <100000000>; + }; + +... diff --git a/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml b/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml new file mode 100644 index 000000000000..c4ab59550fc2 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml @@ -0,0 +1,120 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/arm,arch_timer_mmio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM memory mapped architected timer + +maintainers: + - Marc Zyngier <marc.zyngier@arm.com> + - Mark Rutland <mark.rutland@arm.com> + +description: |+ + ARM cores may have a memory mapped architected timer, which provides up to 8 + frames with a physical and optional virtual timer per frame. + + The memory mapped timer is attached to a GIC to deliver its interrupts via SPIs. + +properties: + compatible: + items: + - enum: + - arm,armv7-timer-mem + + reg: + maxItems: 1 + description: The control frame base address + + '#address-cells': + enum: [1, 2] + + '#size-cells': + const: 1 + + clock-frequency: + description: The frequency of the main counter, in Hz. Should be present + only where necessary to work around broken firmware which does not configure + CNTFRQ on all CPUs to a uniform correct value. Use of this property is + strongly discouraged; fix your firmware unless absolutely impossible. + + always-on: + type: boolean + description: If present, the timer is powered through an always-on power + domain, therefore it never loses context. + + arm,cpu-registers-not-fw-configured: + type: boolean + description: Firmware does not initialize any of the generic timer CPU + registers, which contain their architecturally-defined reset values. Only + supported for 32-bit systems which follow the ARMv7 architected reset + values. + + arm,no-tick-in-suspend: + type: boolean + description: The main counter does not tick when the system is in + low-power system suspend on some SoCs. This behavior does not match the + Architecture Reference Manual's specification that the system counter "must + be implemented in an always-on power domain." + +patternProperties: + '^frame@[0-9a-z]*$': + description: A timer node has up to 8 frame sub-nodes, each with the following properties. + properties: + frame-number: + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - minimum: 0 + maximum: 7 + + interrupts: + minItems: 1 + maxItems: 2 + items: + - description: physical timer irq + - description: virtual timer irq + + reg : + minItems: 1 + maxItems: 2 + items: + - description: 1st view base address + - description: 2nd optional view base address + + required: + - frame-number + - interrupts + - reg + +required: + - compatible + - reg + - '#address-cells' + - '#size-cells' + +examples: + - | + timer@f0000000 { + compatible = "arm,armv7-timer-mem"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + reg = <0xf0000000 0x1000>; + clock-frequency = <50000000>; + + frame@f0001000 { + frame-number = <0>; + interrupts = <0 13 0x8>, + <0 14 0x8>; + reg = <0xf0001000 0x1000>, + <0xf0002000 0x1000>; + }; + + frame@f0003000 { + frame-number = <1>; + interrupts = <0 15 0x8>; + reg = <0xf0003000 0x1000>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/timer/arm,global_timer.txt b/Documentation/devicetree/bindings/timer/arm,global_timer.txt deleted file mode 100644 index bdae3a818793..000000000000 --- a/Documentation/devicetree/bindings/timer/arm,global_timer.txt +++ /dev/null @@ -1,27 +0,0 @@ - -* ARM Global Timer - Cortex-A9 are often associated with a per-core Global timer. - -** Timer node required properties: - -- compatible : should contain - * "arm,cortex-a5-global-timer" for Cortex-A5 global timers. - * "arm,cortex-a9-global-timer" for Cortex-A9 global - timers or any compatible implementation. Note: driver - supports versions r2p0 and above. - -- interrupts : One interrupt to each core - -- reg : Specify the base address and the size of the GT timer - register window. - -- clocks : Should be phandle to a clock. - -Example: - - timer@2c000600 { - compatible = "arm,cortex-a9-global-timer"; - reg = <0x2c000600 0x20>; - interrupts = <1 13 0xf01>; - clocks = <&arm_periph_clk>; - }; diff --git a/Documentation/devicetree/bindings/timer/arm,global_timer.yaml b/Documentation/devicetree/bindings/timer/arm,global_timer.yaml new file mode 100644 index 000000000000..21c24a8e28fd --- /dev/null +++ b/Documentation/devicetree/bindings/timer/arm,global_timer.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/arm,global_timer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM Global Timer + +maintainers: + - Stuart Menefy <stuart.menefy@st.com> + +description: + Cortex-A9 are often associated with a per-core Global timer. + +properties: + compatible: + items: + - enum: + - arm,cortex-a5-global-timer + - arm,cortex-a9-global-timer + + description: driver supports versions r2p0 and above. + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + +examples: + - | + timer@2c000600 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0x2c000600 0x20>; + interrupts = <1 13 0xf01>; + clocks = <&arm_periph_clk>; + }; +... diff --git a/Documentation/devicetree/bindings/trivial-devices.txt b/Documentation/devicetree/bindings/trivial-devices.txt deleted file mode 100644 index 6ab001fa1ed4..000000000000 --- a/Documentation/devicetree/bindings/trivial-devices.txt +++ /dev/null @@ -1,190 +0,0 @@ -This is a list of trivial i2c devices that have simple device tree -bindings, consisting only of a compatible field, an address and -possibly an interrupt line. - -If a device needs more specific bindings, such as properties to -describe some aspect of it, there needs to be a specific binding -document for it just like any other devices. - - -Compatible Vendor / Chip -========== ============= -abracon,abb5zes3 AB-RTCMC-32.768kHz-B5ZE-S3: Real Time Clock/Calendar Module with I2C Interface -ad,ad7414 SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin -ad,adm9240 ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems -adi,adt7461 +/-1C TDM Extended Temp Range I.C -adt7461 +/-1C TDM Extended Temp Range I.C -adi,adt7473 +/-1C TDM Extended Temp Range I.C -adi,adt7475 +/-1C TDM Extended Temp Range I.C -adi,adt7476 +/-1C TDM Extended Temp Range I.C -adi,adt7490 +/-1C TDM Extended Temp Range I.C -adi,adxl345 Three-Axis Digital Accelerometer -adi,adxl346 Three-Axis Digital Accelerometer (backward-compatibility value "adi,adxl345" must be listed too) -ams,iaq-core AMS iAQ-Core VOC Sensor -at,24c08 i2c serial eeprom (24cxx) -atmel,at97sc3204t i2c trusted platform module (TPM) -capella,cm32181 CM32181: Ambient Light Sensor -capella,cm3232 CM3232: Ambient Light Sensor -dallas,ds1374 I2C, 32-Bit Binary Counter Watchdog RTC with Trickle Charger and Reset Input/Output -dallas,ds1631 High-Precision Digital Thermometer -dallas,ds1672 Dallas DS1672 Real-time Clock -dallas,ds1682 Total-Elapsed-Time Recorder with Alarm -dallas,ds1775 Tiny Digital Thermometer and Thermostat -dallas,ds3232 Extremely Accurate I²C RTC with Integrated Crystal and SRAM -dallas,ds4510 CPU Supervisor with Nonvolatile Memory and Programmable I/O -dallas,ds75 Digital Thermometer and Thermostat -devantech,srf02 Devantech SRF02 ultrasonic ranger in I2C mode -devantech,srf08 Devantech SRF08 ultrasonic ranger -devantech,srf10 Devantech SRF10 ultrasonic ranger -dlg,da9053 DA9053: flexible system level PMIC with multicore support -dlg,da9063 DA9063: system PMIC for quad-core application processors -domintech,dmard09 DMARD09: 3-axis Accelerometer -domintech,dmard10 DMARD10: 3-axis Accelerometer -epson,rx8010 I2C-BUS INTERFACE REAL TIME CLOCK MODULE -epson,rx8581 I2C-BUS INTERFACE REAL TIME CLOCK MODULE -emmicro,em3027 EM Microelectronic EM3027 Real-time Clock -fsl,mag3110 MAG3110: Xtrinsic High Accuracy, 3D Magnetometer -fsl,mma7660 MMA7660FC: 3-Axis Orientation/Motion Detection Sensor -fsl,mma8450 MMA8450Q: Xtrinsic Low-power, 3-axis Xtrinsic Accelerometer -fsl,mpl3115 MPL3115: Absolute Digital Pressure Sensor -fsl,mpr121 MPR121: Proximity Capacitive Touch Sensor Controller -fsl,sgtl5000 SGTL5000: Ultra Low-Power Audio Codec -gmt,g751 G751: Digital Temperature Sensor and Thermal Watchdog with Two-Wire Interface -infineon,slb9635tt Infineon SLB9635 (Soft-) I2C TPM (old protocol, max 100khz) -infineon,slb9645tt Infineon SLB9645 I2C TPM (new protocol, max 400khz) -infineon,tlv493d-a1b6 Infineon TLV493D-A1B6 I2C 3D Magnetic Sensor -isil,isl1208 Intersil ISL1208 Low Power RTC with Battery Backed SRAM -isil,isl1218 Intersil ISL1218 Low Power RTC with Battery Backed SRAM -isil,isl12022 Intersil ISL12022 Real-time Clock -isil,isl29028 Intersil ISL29028 Ambient Light and Proximity Sensor -isil,isl29030 Intersil ISL29030 Ambient Light and Proximity Sensor -maxim,ds1050 5 Bit Programmable, Pulse-Width Modulator -maxim,max1237 Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs -maxim,max6621 PECI-to-I2C translator for PECI-to-SMBus/I2C protocol conversion -maxim,max6625 9-Bit/12-Bit Temperature Sensors with I²C-Compatible Serial Interface -mcube,mc3230 mCube 3-axis 8-bit digital accelerometer -memsic,mxc6225 MEMSIC 2-axis 8-bit digital accelerometer -microchip,mcp4017-502 Microchip 7-bit Single I2C Digital POT (5k) -microchip,mcp4017-103 Microchip 7-bit Single I2C Digital POT (10k) -microchip,mcp4017-503 Microchip 7-bit Single I2C Digital POT (50k) -microchip,mcp4017-104 Microchip 7-bit Single I2C Digital POT (100k) -microchip,mcp4018-502 Microchip 7-bit Single I2C Digital POT (5k) -microchip,mcp4018-103 Microchip 7-bit Single I2C Digital POT (10k) -microchip,mcp4018-503 Microchip 7-bit Single I2C Digital POT (50k) -microchip,mcp4018-104 Microchip 7-bit Single I2C Digital POT (100k) -microchip,mcp4019-502 Microchip 7-bit Single I2C Digital POT (5k) -microchip,mcp4019-103 Microchip 7-bit Single I2C Digital POT (10k) -microchip,mcp4019-503 Microchip 7-bit Single I2C Digital POT (50k) -microchip,mcp4019-104 Microchip 7-bit Single I2C Digital POT (100k) -microchip,mcp4531-502 Microchip 7-bit Single I2C Digital Potentiometer (5k) -microchip,mcp4531-103 Microchip 7-bit Single I2C Digital Potentiometer (10k) -microchip,mcp4531-503 Microchip 7-bit Single I2C Digital Potentiometer (50k) -microchip,mcp4531-104 Microchip 7-bit Single I2C Digital Potentiometer (100k) -microchip,mcp4532-502 Microchip 7-bit Single I2C Digital Potentiometer (5k) -microchip,mcp4532-103 Microchip 7-bit Single I2C Digital Potentiometer (10k) -microchip,mcp4532-503 Microchip 7-bit Single I2C Digital Potentiometer (50k) -microchip,mcp4532-104 Microchip 7-bit Single I2C Digital Potentiometer (100k) -microchip,mcp4541-502 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (5k) -microchip,mcp4541-103 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (10k) -microchip,mcp4541-503 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (50k) -microchip,mcp4541-104 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (100k) -microchip,mcp4542-502 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (5k) -microchip,mcp4542-103 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (10k) -microchip,mcp4542-503 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (50k) -microchip,mcp4542-104 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (100k) -microchip,mcp4551-502 Microchip 8-bit Single I2C Digital Potentiometer (5k) -microchip,mcp4551-103 Microchip 8-bit Single I2C Digital Potentiometer (10k) -microchip,mcp4551-503 Microchip 8-bit Single I2C Digital Potentiometer (50k) -microchip,mcp4551-104 Microchip 8-bit Single I2C Digital Potentiometer (100k) -microchip,mcp4552-502 Microchip 8-bit Single I2C Digital Potentiometer (5k) -microchip,mcp4552-103 Microchip 8-bit Single I2C Digital Potentiometer (10k) -microchip,mcp4552-503 Microchip 8-bit Single I2C Digital Potentiometer (50k) -microchip,mcp4552-104 Microchip 8-bit Single I2C Digital Potentiometer (100k) -microchip,mcp4561-502 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (5k) -microchip,mcp4561-103 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (10k) -microchip,mcp4561-503 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (50k) -microchip,mcp4561-104 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (100k) -microchip,mcp4562-502 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (5k) -microchip,mcp4562-103 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (10k) -microchip,mcp4562-503 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (50k) -microchip,mcp4562-104 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (100k) -microchip,mcp4631-502 Microchip 7-bit Dual I2C Digital Potentiometer (5k) -microchip,mcp4631-103 Microchip 7-bit Dual I2C Digital Potentiometer (10k) -microchip,mcp4631-503 Microchip 7-bit Dual I2C Digital Potentiometer (50k) -microchip,mcp4631-104 Microchip 7-bit Dual I2C Digital Potentiometer (100k) -microchip,mcp4632-502 Microchip 7-bit Dual I2C Digital Potentiometer (5k) -microchip,mcp4632-103 Microchip 7-bit Dual I2C Digital Potentiometer (10k) -microchip,mcp4632-503 Microchip 7-bit Dual I2C Digital Potentiometer (50k) -microchip,mcp4632-104 Microchip 7-bit Dual I2C Digital Potentiometer (100k) -microchip,mcp4641-502 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (5k) -microchip,mcp4641-103 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (10k) -microchip,mcp4641-503 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (50k) -microchip,mcp4641-104 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (100k) -microchip,mcp4642-502 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (5k) -microchip,mcp4642-103 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (10k) -microchip,mcp4642-503 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (50k) -microchip,mcp4642-104 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (100k) -microchip,mcp4651-502 Microchip 8-bit Dual I2C Digital Potentiometer (5k) -microchip,mcp4651-103 Microchip 8-bit Dual I2C Digital Potentiometer (10k) -microchip,mcp4651-503 Microchip 8-bit Dual I2C Digital Potentiometer (50k) -microchip,mcp4651-104 Microchip 8-bit Dual I2C Digital Potentiometer (100k) -microchip,mcp4652-502 Microchip 8-bit Dual I2C Digital Potentiometer (5k) -microchip,mcp4652-103 Microchip 8-bit Dual I2C Digital Potentiometer (10k) -microchip,mcp4652-503 Microchip 8-bit Dual I2C Digital Potentiometer (50k) -microchip,mcp4652-104 Microchip 8-bit Dual I2C Digital Potentiometer (100k) -microchip,mcp4661-502 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (5k) -microchip,mcp4661-103 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (10k) -microchip,mcp4661-503 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (50k) -microchip,mcp4661-104 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (100k) -microchip,mcp4662-502 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (5k) -microchip,mcp4662-103 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (10k) -microchip,mcp4662-503 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (50k) -microchip,mcp4662-104 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (100k) -microchip,tc654 PWM Fan Speed Controller With Fan Fault Detection -microchip,tc655 PWM Fan Speed Controller With Fan Fault Detection -microcrystal,rv3029 Real Time Clock Module with I2C-Bus -miramems,da226 MiraMEMS DA226 2-axis 14-bit digital accelerometer -miramems,da280 MiraMEMS DA280 3-axis 14-bit digital accelerometer -miramems,da311 MiraMEMS DA311 3-axis 12-bit digital accelerometer -national,lm63 Temperature sensor with integrated fan control -national,lm75 I2C TEMP SENSOR -national,lm80 Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor -national,lm85 Temperature sensor with integrated fan control -national,lm92 ±0.33°C Accurate, 12-Bit + Sign Temperature Sensor and Thermal Window Comparator with Two-Wire Interface -nuvoton,npct501 i2c trusted platform module (TPM) -nuvoton,npct601 i2c trusted platform module (TPM2) -nuvoton,w83773g Nuvoton Temperature Sensor -nxp,pca9556 Octal SMBus and I2C registered interface -nxp,pca9557 8-bit I2C-bus and SMBus I/O port with reset -nxp,pcf2127 Real-time clock -nxp,pcf2129 Real-time clock -nxp,pcf8523 Real-time Clock -nxp,pcf8563 Real-time clock/calendar -nxp,pcf85063 Tiny Real-Time Clock -oki,ml86v7667 OKI ML86V7667 video decoder -ovti,ov5642 OV5642: Color CMOS QSXGA (5-megapixel) Image Sensor with OmniBSI and Embedded TrueFocus -pericom,pt7c4338 Real-time Clock Module -plx,pex8648 48-Lane, 12-Port PCI Express Gen 2 (5.0 GT/s) Switch -pulsedlight,lidar-lite-v2 Pulsedlight LIDAR range-finding sensor -ricoh,r2025sd I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC -ricoh,r2221tl I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC -ricoh,rs5c372a I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC -ricoh,rs5c372b I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC -ricoh,rv5c386 I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC -ricoh,rv5c387a I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC -samsung,24ad0xd1 S524AD0XF1 (128K/256K-bit Serial EEPROM for Low Power) -sgx,vz89x SGX Sensortech VZ89X Sensors -sii,s35390a 2-wire CMOS real-time clock -silabs,si7020 Relative Humidity and Temperature Sensors -skyworks,sky81452 Skyworks SKY81452: Six-Channel White LED Driver with Touch Panel Bias Supply -st,24c256 i2c serial eeprom (24cxx) -taos,tsl2550 Ambient Light Sensor with SMBUS/Two Wire Serial Interface -ti,ads7828 8-Channels, 12-bit ADC -ti,ads7830 8-Channels, 8-bit ADC -ti,amc6821 Temperature Monitoring and Fan Control -ti,tsc2003 I2C Touch-Screen Controller -ti,tmp102 Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface -ti,tmp103 Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface -ti,tmp275 Digital Temperature Sensor -winbond,w83793 Winbond/Nuvoton H/W Monitor -winbond,wpct301 i2c trusted platform module (TPM) diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml new file mode 100644 index 000000000000..cc64ec63a6ad --- /dev/null +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -0,0 +1,342 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/trivial-devices.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Trivial I2C and SPI devices that have simple device tree bindings + +maintainers: + - Rob Herring <robh@kernel.org> + +description: | + This is a list of trivial I2C and SPI devices that have simple device tree + bindings, consisting only of a compatible field, an address and possibly an + interrupt line. + + If a device needs more specific bindings, such as properties to + describe some aspect of it, there needs to be a specific binding + document for it just like any other devices. + +properties: + reg: + maxItems: 1 + interrupts: + maxItems: 1 + compatible: + items: + - enum: + # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin + - ad,ad7414 + # ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems + - ad,adm9240 + # +/-1C TDM Extended Temp Range I.C + - adi,adt7461 + # +/-1C TDM Extended Temp Range I.C + - adt7461 + # +/-1C TDM Extended Temp Range I.C + - adi,adt7473 + # +/-1C TDM Extended Temp Range I.C + - adi,adt7475 + # +/-1C TDM Extended Temp Range I.C + - adi,adt7476 + # +/-1C TDM Extended Temp Range I.C + - adi,adt7490 + # Three-Axis Digital Accelerometer + - adi,adxl345 + # Three-Axis Digital Accelerometer (backward-compatibility value "adi,adxl345" must be listed too) + - adi,adxl346 + # AMS iAQ-Core VOC Sensor + - ams,iaq-core + # i2c serial eeprom (24cxx) + - at,24c08 + # i2c trusted platform module (TPM) + - atmel,at97sc3204t + # CM32181: Ambient Light Sensor + - capella,cm32181 + # CM3232: Ambient Light Sensor + - capella,cm3232 + # High-Precision Digital Thermometer + - dallas,ds1631 + # Total-Elapsed-Time Recorder with Alarm + - dallas,ds1682 + # Tiny Digital Thermometer and Thermostat + - dallas,ds1775 + # CPU Supervisor with Nonvolatile Memory and Programmable I/O + - dallas,ds4510 + # Digital Thermometer and Thermostat + - dallas,ds75 + # Devantech SRF02 ultrasonic ranger in I2C mode + - devantech,srf02 + # Devantech SRF08 ultrasonic ranger + - devantech,srf08 + # Devantech SRF10 ultrasonic ranger + - devantech,srf10 + # DA9053: flexible system level PMIC with multicore support + - dlg,da9053 + # DA9063: system PMIC for quad-core application processors + - dlg,da9063 + # DMARD09: 3-axis Accelerometer + - domintech,dmard09 + # DMARD10: 3-axis Accelerometer + - domintech,dmard10 + # MMA7660FC: 3-Axis Orientation/Motion Detection Sensor + - fsl,mma7660 + # MMA8450Q: Xtrinsic Low-power, 3-axis Xtrinsic Accelerometer + - fsl,mma8450 + # MPL3115: Absolute Digital Pressure Sensor + - fsl,mpl3115 + # MPR121: Proximity Capacitive Touch Sensor Controller + - fsl,mpr121 + # SGTL5000: Ultra Low-Power Audio Codec + - fsl,sgtl5000 + # G751: Digital Temperature Sensor and Thermal Watchdog with Two-Wire Interface + - gmt,g751 + # Infineon SLB9635 (Soft-) I2C TPM (old protocol, max 100khz) + - infineon,slb9635tt + # Infineon SLB9645 I2C TPM (new protocol, max 400khz) + - infineon,slb9645tt + # Infineon TLV493D-A1B6 I2C 3D Magnetic Sensor + - infineon,tlv493d-a1b6 + # Intersil ISL29028 Ambient Light and Proximity Sensor + - isil,isl29028 + # Intersil ISL29030 Ambient Light and Proximity Sensor + - isil,isl29030 + # 5 Bit Programmable, Pulse-Width Modulator + - maxim,ds1050 + # Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs + - maxim,max1237 + # PECI-to-I2C translator for PECI-to-SMBus/I2C protocol conversion + - maxim,max6621 + # 9-Bit/12-Bit Temperature Sensors with I²C-Compatible Serial Interface + - maxim,max6625 + # mCube 3-axis 8-bit digital accelerometer + - mcube,mc3230 + # MEMSIC 2-axis 8-bit digital accelerometer + - memsic,mxc6225 + # Microchip 7-bit Single I2C Digital POT (5k) + - microchip,mcp4017-502 + # Microchip 7-bit Single I2C Digital POT (10k) + - microchip,mcp4017-103 + # Microchip 7-bit Single I2C Digital POT (50k) + - microchip,mcp4017-503 + # Microchip 7-bit Single I2C Digital POT (100k) + - microchip,mcp4017-104 + # Microchip 7-bit Single I2C Digital POT (5k) + - microchip,mcp4018-502 + # Microchip 7-bit Single I2C Digital POT (10k) + - microchip,mcp4018-103 + # Microchip 7-bit Single I2C Digital POT (50k) + - microchip,mcp4018-503 + # Microchip 7-bit Single I2C Digital POT (100k) + - microchip,mcp4018-104 + # Microchip 7-bit Single I2C Digital POT (5k) + - microchip,mcp4019-502 + # Microchip 7-bit Single I2C Digital POT (10k) + - microchip,mcp4019-103 + # Microchip 7-bit Single I2C Digital POT (50k) + - microchip,mcp4019-503 + # Microchip 7-bit Single I2C Digital POT (100k) + - microchip,mcp4019-104 + # Microchip 7-bit Single I2C Digital Potentiometer (5k) + - microchip,mcp4531-502 + # Microchip 7-bit Single I2C Digital Potentiometer (10k) + - microchip,mcp4531-103 + # Microchip 7-bit Single I2C Digital Potentiometer (50k) + - microchip,mcp4531-503 + # Microchip 7-bit Single I2C Digital Potentiometer (100k) + - microchip,mcp4531-104 + # Microchip 7-bit Single I2C Digital Potentiometer (5k) + - microchip,mcp4532-502 + # Microchip 7-bit Single I2C Digital Potentiometer (10k) + - microchip,mcp4532-103 + # Microchip 7-bit Single I2C Digital Potentiometer (50k) + - microchip,mcp4532-503 + # Microchip 7-bit Single I2C Digital Potentiometer (100k) + - microchip,mcp4532-104 + # Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (5k) + - microchip,mcp4541-502 + # Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (10k) + - microchip,mcp4541-103 + # Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (50k) + - microchip,mcp4541-503 + # Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (100k) + - microchip,mcp4541-104 + # Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (5k) + - microchip,mcp4542-502 + # Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (10k) + - microchip,mcp4542-103 + # Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (50k) + - microchip,mcp4542-503 + # Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (100k) + - microchip,mcp4542-104 + # Microchip 8-bit Single I2C Digital Potentiometer (5k) + - microchip,mcp4551-502 + # Microchip 8-bit Single I2C Digital Potentiometer (10k) + - microchip,mcp4551-103 + # Microchip 8-bit Single I2C Digital Potentiometer (50k) + - microchip,mcp4551-503 + # Microchip 8-bit Single I2C Digital Potentiometer (100k) + - microchip,mcp4551-104 + # Microchip 8-bit Single I2C Digital Potentiometer (5k) + - microchip,mcp4552-502 + # Microchip 8-bit Single I2C Digital Potentiometer (10k) + - microchip,mcp4552-103 + # Microchip 8-bit Single I2C Digital Potentiometer (50k) + - microchip,mcp4552-503 + # Microchip 8-bit Single I2C Digital Potentiometer (100k) + - microchip,mcp4552-104 + # Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (5k) + - microchip,mcp4561-502 + # Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (10k) + - microchip,mcp4561-103 + # Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (50k) + - microchip,mcp4561-503 + # Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (100k) + - microchip,mcp4561-104 + # Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (5k) + - microchip,mcp4562-502 + # Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (10k) + - microchip,mcp4562-103 + # Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (50k) + - microchip,mcp4562-503 + # Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (100k) + - microchip,mcp4562-104 + # Microchip 7-bit Dual I2C Digital Potentiometer (5k) + - microchip,mcp4631-502 + # Microchip 7-bit Dual I2C Digital Potentiometer (10k) + - microchip,mcp4631-103 + # Microchip 7-bit Dual I2C Digital Potentiometer (50k) + - microchip,mcp4631-503 + # Microchip 7-bit Dual I2C Digital Potentiometer (100k) + - microchip,mcp4631-104 + # Microchip 7-bit Dual I2C Digital Potentiometer (5k) + - microchip,mcp4632-502 + # Microchip 7-bit Dual I2C Digital Potentiometer (10k) + - microchip,mcp4632-103 + # Microchip 7-bit Dual I2C Digital Potentiometer (50k) + - microchip,mcp4632-503 + # Microchip 7-bit Dual I2C Digital Potentiometer (100k) + - microchip,mcp4632-104 + # Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (5k) + - microchip,mcp4641-502 + # Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (10k) + - microchip,mcp4641-103 + # Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (50k) + - microchip,mcp4641-503 + # Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (100k) + - microchip,mcp4641-104 + # Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (5k) + - microchip,mcp4642-502 + # Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (10k) + - microchip,mcp4642-103 + # Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (50k) + - microchip,mcp4642-503 + # Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (100k) + - microchip,mcp4642-104 + # Microchip 8-bit Dual I2C Digital Potentiometer (5k) + - microchip,mcp4651-502 + # Microchip 8-bit Dual I2C Digital Potentiometer (10k) + - microchip,mcp4651-103 + # Microchip 8-bit Dual I2C Digital Potentiometer (50k) + - microchip,mcp4651-503 + # Microchip 8-bit Dual I2C Digital Potentiometer (100k) + - microchip,mcp4651-104 + # Microchip 8-bit Dual I2C Digital Potentiometer (5k) + - microchip,mcp4652-502 + # Microchip 8-bit Dual I2C Digital Potentiometer (10k) + - microchip,mcp4652-103 + # Microchip 8-bit Dual I2C Digital Potentiometer (50k) + - microchip,mcp4652-503 + # Microchip 8-bit Dual I2C Digital Potentiometer (100k) + - microchip,mcp4652-104 + # Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (5k) + - microchip,mcp4661-502 + # Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (10k) + - microchip,mcp4661-103 + # Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (50k) + - microchip,mcp4661-503 + # Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (100k) + - microchip,mcp4661-104 + # Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (5k) + - microchip,mcp4662-502 + # Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (10k) + - microchip,mcp4662-103 + # Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (50k) + - microchip,mcp4662-503 + # Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (100k) + - microchip,mcp4662-104 + # PWM Fan Speed Controller With Fan Fault Detection + - microchip,tc654 + # PWM Fan Speed Controller With Fan Fault Detection + - microchip,tc655 + # MiraMEMS DA226 2-axis 14-bit digital accelerometer + - miramems,da226 + # MiraMEMS DA280 3-axis 14-bit digital accelerometer + - miramems,da280 + # MiraMEMS DA311 3-axis 12-bit digital accelerometer + - miramems,da311 + # Temperature sensor with integrated fan control + - national,lm63 + # I2C TEMP SENSOR + - national,lm75 + # Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor + - national,lm80 + # Temperature sensor with integrated fan control + - national,lm85 + # ±0.33°C Accurate, 12-Bit + Sign Temperature Sensor and Thermal Window Comparator with Two-Wire Interface + - national,lm92 + # i2c trusted platform module (TPM) + - nuvoton,npct501 + # i2c trusted platform module (TPM2) + - nuvoton,npct601 + # Nuvoton Temperature Sensor + - nuvoton,w83773g + # Octal SMBus and I2C registered interface + - nxp,pca9556 + # 8-bit I2C-bus and SMBus I/O port with reset + - nxp,pca9557 + # OKI ML86V7667 video decoder + - oki,ml86v7667 + # OV5642: Color CMOS QSXGA (5-megapixel) Image Sensor with OmniBSI and Embedded TrueFocus + - ovti,ov5642 + # 48-Lane, 12-Port PCI Express Gen 2 (5.0 GT/s) Switch + - plx,pex8648 + # Pulsedlight LIDAR range-finding sensor + - pulsedlight,lidar-lite-v2 + # S524AD0XF1 (128K/256K-bit Serial EEPROM for Low Power) + - samsung,24ad0xd1 + # SGX Sensortech VZ89X Sensors + - sgx,vz89x + # Relative Humidity and Temperature Sensors + - silabs,si7020 + # Skyworks SKY81452: Six-Channel White LED Driver with Touch Panel Bias Supply + - skyworks,sky81452 + # i2c serial eeprom (24cxx) + - st,24c256 + # Ambient Light Sensor with SMBUS/Two Wire Serial Interface + - taos,tsl2550 + # 8-Channels, 12-bit ADC + - ti,ads7828 + # 8-Channels, 8-bit ADC + - ti,ads7830 + # Temperature Monitoring and Fan Control + - ti,amc6821 + # I2C Touch-Screen Controller + - ti,tsc2003 + # Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface + - ti,tmp102 + # Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface + - ti,tmp103 + # Digital Temperature Sensor + - ti,tmp275 + # Winbond/Nuvoton H/W Monitor + - winbond,w83793 + # i2c trusted platform module (TPM) + - winbond,wpct301 + +required: + - compatible + - reg + +... diff --git a/Documentation/devicetree/todo.txt b/Documentation/devicetree/todo.txt deleted file mode 100644 index b5139d1de811..000000000000 --- a/Documentation/devicetree/todo.txt +++ /dev/null @@ -1,10 +0,0 @@ -Todo list for devicetree: - -=== General structure === -- Switch from custom lists to (h)list_head for nodes and properties structure - -=== CONFIG_OF_DYNAMIC === -- Switch to RCU for tree updates and get rid of global spinlock -- Document node lifecycle for CONFIG_OF_DYNAMIC -- Always set ->full_name at of_attach_node() time -- pseries: Get rid of open-coded tree modification from arch/powerpc/platforms/pseries/dlpar.c diff --git a/Documentation/devicetree/writing-schema.md b/Documentation/devicetree/writing-schema.md new file mode 100644 index 000000000000..a3652d33a48f --- /dev/null +++ b/Documentation/devicetree/writing-schema.md @@ -0,0 +1,130 @@ +# Writing DeviceTree Bindings in json-schema + +Devicetree bindings are written using json-schema vocabulary. Schema files are +written in a JSON compatible subset of YAML. YAML is used instead of JSON as it +considered more human readable and has some advantages such as allowing +comments (Prefixed with '#'). + +## Schema Contents + +Each schema doc is a structured json-schema which is defined by a set of +top-level properties. Generally, there is one binding defined per file. The +top-level json-schema properties used are: + +- __$id__ - A json-schema unique identifier string. The string must be a valid +URI typically containing the binding's filename and path. For DT schema, it must +begin with "http://devicetree.org/schemas/". The URL is used in constructing +references to other files specified in schema "$ref" properties. A $ref values +with a leading '/' will have the hostname prepended. A $ref value a relative +path or filename only will be prepended with the hostname and path components +of the current schema file's '$id' value. A URL is used even for local files, +but there may not actually be files present at those locations. + +- __$schema__ - Indicates the meta-schema the schema file adheres to. + +- __title__ - A one line description on the contents of the binding schema. + +- __maintainers__ - A DT specific property. Contains a list of email address(es) +for maintainers of this binding. + +- __description__ - Optional. A multi-line text block containing any detailed +information about this binding. It should contain things such as what the block +or device does, standards the device conforms to, and links to datasheets for +more information. + +- __select__ - Optional. A json-schema used to match nodes for applying the +schema. By default without 'select', nodes are matched against their possible +compatible string values or node name. Most bindings should not need select. + +- __allOf__ - Optional. A list of other schemas to include. This is used to +include other schemas the binding conforms to. This may be schemas for a +particular class of devices such as I2C or SPI controllers. + +- __properties__ - A set of sub-schema defining all the DT properties for the +binding. The exact schema syntax depends on whether properties are known, +common properties (e.g. 'interrupts') or are binding/vendor specific properties. + + A property can also define a child DT node with child properties defined +under it. + + For more details on properties sections, see 'Property Schema' section. + +- __patternProperties__ - Optional. Similar to 'properties', but names are regex. + +- __required__ - A list of DT properties from the 'properties' section that +must always be present. + +- __examples__ - Optional. A list of one or more DTS hunks implementing the +binding. Note: YAML doesn't allow leading tabs, so spaces must be used instead. + +Unless noted otherwise, all properties are required. + +## Property Schema + +The 'properties' section of the schema contains all the DT properties for a +binding. Each property contains a set of constraints using json-schema +vocabulary for that property. The properties schemas are what is used for +validation of DT files. + +For common properties, only additional constraints not covered by the common +binding schema need to be defined such as how many values are valid or what +possible values are valid. + +Vendor specific properties will typically need more detailed schema. With the +exception of boolean properties, they should have a reference to a type in +schemas/types.yaml. A "description" property is always required. + +The Devicetree schemas don't exactly match the YAML encoded DT data produced by +dtc. They are simplified to make them more compact and avoid a bunch of +boilerplate. The tools process the schema files to produce the final schema for +validation. There are currently 2 transformations the tools perform. + +The default for arrays in json-schema is they are variable sized and allow more +entries than explicitly defined. This can be restricted by defining 'minItems', +'maxItems', and 'additionalItems'. However, for DeviceTree Schemas, a fixed +size is desired in most cases, so these properties are added based on the +number of entries in an 'items' list. + +The YAML Devicetree format also makes all string values an array and scalar +values a matrix (in order to define groupings) even when only a single value +is present. Single entries in schemas are fixed up to match this encoding. + +## Testing + +### Dependencies + +The DT schema project must be installed in order to validate the DT schema +binding documents and validate DTS files using the DT schema. The DT schema +project can be installed with pip: + +`pip3 install git+https://github.com/robherring/yaml-bindings.git@master` + +dtc must also be built with YAML output support enabled. This requires that +libyaml and its headers be installed on the host system. + +### Running checks + +The DT schema binding documents must be validated using the meta-schema (the +schema for the schema) to ensure they are both valid json-schema and valid +binding schema. All of the DT binding documents can be validated using the +`dt_binding_check` target: + +`make dt_binding_check` + +In order to perform validation of DT source files, use the `dtbs_check` target: + +`make dtbs_check` + +This will first run the `dt_binding_check` which generates the processed schema. + +It is also possible to run checks with a single schema file by setting the +'DT_SCHEMA_FILES' variable to a specific schema file. + +`make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/trivial-devices.yaml` + + +## json-schema Resources + +[JSON-Schema Specifications](http://json-schema.org/) + +[Using JSON Schema Book](http://usingjsonschema.com/) diff --git a/MAINTAINERS b/MAINTAINERS index 966dc329013c..67e448eab276 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2353,7 +2353,7 @@ F: drivers/pinctrl/zte/ F: drivers/soc/zte/ F: drivers/thermal/zx2967_thermal.c F: drivers/watchdog/zx2967_wdt.c -F: Documentation/devicetree/bindings/arm/zte.txt +F: Documentation/devicetree/bindings/arm/zte.yaml F: Documentation/devicetree/bindings/clock/zx2967*.txt F: Documentation/devicetree/bindings/dma/zxdma.txt F: Documentation/devicetree/bindings/gpio/zx296702-gpio.txt @@ -1230,10 +1230,13 @@ ifneq ($(dtstree),) %.dtb: prepare3 scripts_dtc $(Q)$(MAKE) $(build)=$(dtstree) $(dtstree)/$@ -PHONY += dtbs dtbs_install -dtbs: prepare3 scripts_dtc +PHONY += dtbs dtbs_install dt_binding_check +dtbs dtbs_check: prepare3 scripts_dtc $(Q)$(MAKE) $(build)=$(dtstree) +dtbs_check: export CHECK_DTBS=1 +dtbs_check: dt_binding_check + dtbs_install: $(Q)$(MAKE) $(dtbinst)=$(dtstree) @@ -1247,6 +1250,9 @@ PHONY += scripts_dtc scripts_dtc: scripts_basic $(Q)$(MAKE) $(build)=scripts/dtc +dt_binding_check: scripts_dtc + $(Q)$(MAKE) $(build)=Documentation/devicetree/bindings + # --------------------------------------------------------------------------- # Modules @@ -1609,7 +1615,8 @@ clean: $(clean-dirs) $(call cmd,rmfiles) @find $(if $(KBUILD_EXTMOD), $(KBUILD_EXTMOD), .) $(RCS_FIND_IGNORE) \ \( -name '*.[aios]' -o -name '*.ko' -o -name '.*.cmd' \ - -o -name '*.ko.*' -o -name '*.dtb' -o -name '*.dtb.S' \ + -o -name '*.ko.*' \ + -o -name '*.dtb' -o -name '*.dtb.S' -o -name '*.dt.yaml' \ -o -name '*.dwo' -o -name '*.lst' \ -o -name '*.su' \ -o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \ diff --git a/arch/arc/mm/init.c b/arch/arc/mm/init.c index f8fe5668b30f..43bf4c3a1290 100644 --- a/arch/arc/mm/init.c +++ b/arch/arc/mm/init.c @@ -78,24 +78,6 @@ void __init early_init_dt_add_memory_arch(u64 base, u64 size) base, TO_MB(size), !in_use ? "Not used":""); } -#ifdef CONFIG_BLK_DEV_INITRD -static int __init early_initrd(char *p) -{ - unsigned long start, size; - char *endp; - - start = memparse(p, &endp); - if (*endp == ',') { - size = memparse(endp + 1, NULL); - - initrd_start = (unsigned long)__va(start); - initrd_end = (unsigned long)__va(start + size); - } - return 0; -} -early_param("initrd", early_initrd); -#endif - /* * First memory setup routine called from setup_arch() * 1. setup swapper's mm @init_mm @@ -140,8 +122,11 @@ void __init setup_arch_memory(void) memblock_reserve(low_mem_start, __pa(_end) - low_mem_start); #ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - memblock_reserve(__pa(initrd_start), initrd_end - initrd_start); + if (phys_initrd_size) { + memblock_reserve(phys_initrd_start, phys_initrd_size); + initrd_start = (unsigned long)__va(phys_initrd_start); + initrd_end = initrd_start + phys_initrd_size; + } #endif early_init_fdt_reserve_self(); diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 32e4845af2b6..478ea8b7db87 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c @@ -50,26 +50,7 @@ unsigned long __init __clear_cr(unsigned long mask) } #endif -static phys_addr_t phys_initrd_start __initdata = 0; -static unsigned long phys_initrd_size __initdata = 0; - -static int __init early_initrd(char *p) -{ - phys_addr_t start; - unsigned long size; - char *endp; - - start = memparse(p, &endp); - if (*endp == ',') { - size = memparse(endp + 1, NULL); - - phys_initrd_start = start; - phys_initrd_size = size; - } - return 0; -} -early_param("initrd", early_initrd); - +#ifdef CONFIG_BLK_DEV_INITRD static int __init parse_tag_initrd(const struct tag *tag) { pr_warn("ATAG_INITRD is deprecated; " @@ -89,6 +70,7 @@ static int __init parse_tag_initrd2(const struct tag *tag) } __tagtable(ATAG_INITRD2, parse_tag_initrd2); +#endif static void __init find_limits(unsigned long *min, unsigned long *max_low, unsigned long *max_high) @@ -236,12 +218,6 @@ static void __init arm_initrd_init(void) phys_addr_t start; unsigned long size; - /* FDT scan will populate initrd_start */ - if (initrd_start && !phys_initrd_size) { - phys_initrd_start = __virt_to_phys(initrd_start); - phys_initrd_size = initrd_end - initrd_start; - } - initrd_start = initrd_end = 0; if (!phys_initrd_size) diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h index 2bb8721da7ef..e1ec947e7c0c 100644 --- a/arch/arm64/include/asm/memory.h +++ b/arch/arm64/include/asm/memory.h @@ -171,14 +171,6 @@ #define IOREMAP_MAX_ORDER (PMD_SHIFT) #endif -#ifdef CONFIG_BLK_DEV_INITRD -#define __early_init_dt_declare_initrd(__start, __end) \ - do { \ - initrd_start = (__start); \ - initrd_end = (__end); \ - } while (0) -#endif - #ifndef __ASSEMBLY__ #include <linux/bitops.h> diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index cbba537ba3d2..a8f2e4792ef9 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c @@ -63,24 +63,6 @@ EXPORT_SYMBOL(memstart_addr); phys_addr_t arm64_dma_phys_limit __ro_after_init; -#ifdef CONFIG_BLK_DEV_INITRD -static int __init early_initrd(char *p) -{ - unsigned long start, size; - char *endp; - - start = memparse(p, &endp); - if (*endp == ',') { - size = memparse(endp + 1, NULL); - - initrd_start = start; - initrd_end = start + size; - } - return 0; -} -early_param("initrd", early_initrd); -#endif - #ifdef CONFIG_KEXEC_CORE /* * reserve_crashkernel() - reserves memory for crash kernel @@ -417,14 +399,14 @@ void __init arm64_memblock_init(void) memblock_add(__pa_symbol(_text), (u64)(_end - _text)); } - if (IS_ENABLED(CONFIG_BLK_DEV_INITRD) && initrd_start) { + if (IS_ENABLED(CONFIG_BLK_DEV_INITRD) && phys_initrd_size) { /* * Add back the memory we just removed if it results in the * initrd to become inaccessible via the linear mapping. * Otherwise, this is a no-op */ - u64 base = initrd_start & PAGE_MASK; - u64 size = PAGE_ALIGN(initrd_end) - base; + u64 base = phys_initrd_start & PAGE_MASK; + u64 size = PAGE_ALIGN(phys_initrd_size); /* * We can only add back the initrd memory if we don't end up @@ -468,15 +450,11 @@ void __init arm64_memblock_init(void) * pagetables with memblock. */ memblock_reserve(__pa_symbol(_text), _end - _text); -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) { - memblock_reserve(initrd_start, initrd_end - initrd_start); - + if (IS_ENABLED(CONFIG_BLK_DEV_INITRD) && phys_initrd_size) { /* the generic initrd code expects virtual addresses */ - initrd_start = __phys_to_virt(initrd_start); - initrd_end = __phys_to_virt(initrd_end); + initrd_start = __phys_to_virt(phys_initrd_start); + initrd_end = initrd_start + phys_initrd_size; } -#endif early_init_fdt_scan_reserved_mem(); diff --git a/arch/nds32/mm/init.c b/arch/nds32/mm/init.c index 131104bd2538..253f79fc7196 100644 --- a/arch/nds32/mm/init.c +++ b/arch/nds32/mm/init.c @@ -21,8 +21,6 @@ DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); DEFINE_SPINLOCK(anon_alias_lock); extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; -extern unsigned long phys_initrd_start; -extern unsigned long phys_initrd_size; /* * empty_zero_page is a special page that is used for diff --git a/arch/powerpc/platforms/pseries/dlpar.c b/arch/powerpc/platforms/pseries/dlpar.c index 7625546caefd..17958043e7f7 100644 --- a/arch/powerpc/platforms/pseries/dlpar.c +++ b/arch/powerpc/platforms/pseries/dlpar.c @@ -270,6 +270,8 @@ int dlpar_detach_node(struct device_node *dn) if (rc) return rc; + of_node_put(dn); + return 0; } diff --git a/arch/unicore32/mm/init.c b/arch/unicore32/mm/init.c index cf4eb9481fd6..85ef2c624090 100644 --- a/arch/unicore32/mm/init.c +++ b/arch/unicore32/mm/init.c @@ -30,25 +30,6 @@ #include "mm.h" -static unsigned long phys_initrd_start __initdata = 0x01000000; -static unsigned long phys_initrd_size __initdata = SZ_8M; - -static int __init early_initrd(char *p) -{ - unsigned long start, size; - char *endp; - - start = memparse(p, &endp); - if (*endp == ',') { - size = memparse(endp + 1, NULL); - - phys_initrd_start = start; - phys_initrd_size = size; - } - return 0; -} -early_param("initrd", early_initrd); - /* * This keeps memory configuration data used by a couple memory * initialization functions, as well as show_mem() for the skipping @@ -156,6 +137,11 @@ void __init uc32_memblock_init(struct meminfo *mi) memblock_reserve(__pa(_text), _end - _text); #ifdef CONFIG_BLK_DEV_INITRD + if (!phys_initrd_size) { + phys_initrd_start = 0x01000000; + phys_initrd_size = SZ_8M; + } + if (phys_initrd_size) { memblock_reserve(phys_initrd_start, phys_initrd_size); diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index d3d4f65b377b..0868a9d81c3c 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -1199,8 +1199,8 @@ static void __init gic_populate_ppi_partitions(struct device_node *gic_node) part->partition_id = of_node_to_fwnode(child_part); - pr_info("GIC: PPI partition %s[%d] { ", - child_part->name, part_idx); + pr_info("GIC: PPI partition %pOFn[%d] { ", + child_part, part_idx); n = of_property_count_elems_of_size(child_part, "affinity", sizeof(u32)); diff --git a/drivers/irqchip/irq-orion.c b/drivers/irqchip/irq-orion.c index be4c5a8c9659..c4b5ffb61954 100644 --- a/drivers/irqchip/irq-orion.c +++ b/drivers/irqchip/irq-orion.c @@ -64,14 +64,14 @@ static int __init orion_irq_init(struct device_node *np, num_chips * ORION_IRQS_PER_CHIP, &irq_generic_chip_ops, NULL); if (!orion_irq_domain) - panic("%s: unable to add irq domain\n", np->name); + panic("%pOFn: unable to add irq domain\n", np); ret = irq_alloc_domain_generic_chips(orion_irq_domain, - ORION_IRQS_PER_CHIP, 1, np->name, + ORION_IRQS_PER_CHIP, 1, np->full_name, handle_level_irq, clr, 0, IRQ_GC_INIT_MASK_CACHE); if (ret) - panic("%s: unable to alloc irq domain gc\n", np->name); + panic("%pOFn: unable to alloc irq domain gc\n", np); for (n = 0, base = 0; n < num_chips; n++, base += ORION_IRQS_PER_CHIP) { struct irq_chip_generic *gc = @@ -80,12 +80,12 @@ static int __init orion_irq_init(struct device_node *np, of_address_to_resource(np, n, &r); if (!request_mem_region(r.start, resource_size(&r), np->name)) - panic("%s: unable to request mem region %d", - np->name, n); + panic("%pOFn: unable to request mem region %d", + np, n); gc->reg_base = ioremap(r.start, resource_size(&r)); if (!gc->reg_base) - panic("%s: unable to map resource %d", np->name, n); + panic("%pOFn: unable to map resource %d", np, n); gc->chip_types[0].regs.mask = ORION_IRQ_MASK; gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; @@ -150,20 +150,20 @@ static int __init orion_bridge_irq_init(struct device_node *np, domain = irq_domain_add_linear(np, nrirqs, &irq_generic_chip_ops, NULL); if (!domain) { - pr_err("%s: unable to add irq domain\n", np->name); + pr_err("%pOFn: unable to add irq domain\n", np); return -ENOMEM; } ret = irq_alloc_domain_generic_chips(domain, nrirqs, 1, np->name, handle_edge_irq, clr, 0, IRQ_GC_INIT_MASK_CACHE); if (ret) { - pr_err("%s: unable to alloc irq domain gc\n", np->name); + pr_err("%pOFn: unable to alloc irq domain gc\n", np); return ret; } ret = of_address_to_resource(np, 0, &r); if (ret) { - pr_err("%s: unable to get resource\n", np->name); + pr_err("%pOFn: unable to get resource\n", np); return ret; } @@ -175,14 +175,14 @@ static int __init orion_bridge_irq_init(struct device_node *np, /* Map the parent interrupt for the chained handler */ irq = irq_of_parse_and_map(np, 0); if (irq <= 0) { - pr_err("%s: unable to parse irq\n", np->name); + pr_err("%pOFn: unable to parse irq\n", np); return -EINVAL; } gc = irq_get_domain_generic_chip(domain, 0); gc->reg_base = ioremap(r.start, resource_size(&r)); if (!gc->reg_base) { - pr_err("%s: unable to map resource\n", np->name); + pr_err("%pOFn: unable to map resource\n", np); return -ENOMEM; } diff --git a/drivers/irqchip/irq-tb10x.c b/drivers/irqchip/irq-tb10x.c index 848d782a2a3b..7e6708099a7b 100644 --- a/drivers/irqchip/irq-tb10x.c +++ b/drivers/irqchip/irq-tb10x.c @@ -115,21 +115,21 @@ static int __init of_tb10x_init_irq(struct device_node *ictl, void __iomem *reg_base; if (of_address_to_resource(ictl, 0, &mem)) { - pr_err("%s: No registers declared in DeviceTree.\n", - ictl->name); + pr_err("%pOFn: No registers declared in DeviceTree.\n", + ictl); return -EINVAL; } if (!request_mem_region(mem.start, resource_size(&mem), - ictl->name)) { - pr_err("%s: Request mem region failed.\n", ictl->name); + ictl->full_name)) { + pr_err("%pOFn: Request mem region failed.\n", ictl); return -EBUSY; } reg_base = ioremap(mem.start, resource_size(&mem)); if (!reg_base) { ret = -EBUSY; - pr_err("%s: ioremap failed.\n", ictl->name); + pr_err("%pOFn: ioremap failed.\n", ictl); goto ioremap_fail; } @@ -137,8 +137,8 @@ static int __init of_tb10x_init_irq(struct device_node *ictl, &irq_generic_chip_ops, NULL); if (!domain) { ret = -ENOMEM; - pr_err("%s: Could not register interrupt domain.\n", - ictl->name); + pr_err("%pOFn: Could not register interrupt domain.\n", + ictl); goto irq_domain_add_fail; } @@ -147,8 +147,8 @@ static int __init of_tb10x_init_irq(struct device_node *ictl, IRQ_NOREQUEST, IRQ_NOPROBE, IRQ_GC_INIT_MASK_CACHE); if (ret) { - pr_err("%s: Could not allocate generic interrupt chip.\n", - ictl->name); + pr_err("%pOFn: Could not allocate generic interrupt chip.\n", + ictl); goto gc_alloc_fail; } diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index e1d91e64e008..a2188f7c04c6 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -2146,8 +2146,8 @@ static int gpmc_probe_generic_child(struct platform_device *pdev, gpmc_s.device_width = GPMC_DEVWIDTH_16BIT; break; default: - dev_err(&pdev->dev, "%s: invalid 'nand-bus-width'\n", - child->name); + dev_err(&pdev->dev, "%pOFn: invalid 'nand-bus-width'\n", + child); ret = -EINVAL; goto err; } @@ -2188,8 +2188,8 @@ static int gpmc_probe_generic_child(struct platform_device *pdev, ret = gpmc_cs_set_timings(cs, &gpmc_t, &gpmc_s); if (ret) { - dev_err(&pdev->dev, "failed to set gpmc timings for: %s\n", - child->name); + dev_err(&pdev->dev, "failed to set gpmc timings for: %pOFn\n", + child); goto err_cs; } @@ -2217,7 +2217,7 @@ no_timings: err_child_fail: - dev_err(&pdev->dev, "failed to create gpmc child %s\n", child->name); + dev_err(&pdev->dev, "failed to create gpmc child %pOFn\n", child); ret = -ENODEV; err_cs: @@ -2267,14 +2267,10 @@ static void gpmc_probe_dt_children(struct platform_device *pdev) struct device_node *child; for_each_available_child_of_node(pdev->dev.of_node, child) { - - if (!child->name) - continue; - ret = gpmc_probe_generic_child(pdev, child); if (ret) { - dev_err(&pdev->dev, "failed to probe DT child '%s': %d\n", - child->name, ret); + dev_err(&pdev->dev, "failed to probe DT child '%pOFn': %d\n", + child, ret); } } } diff --git a/drivers/memory/samsung/exynos-srom.c b/drivers/memory/samsung/exynos-srom.c index 7edd7fb540f2..c27c6105c66d 100644 --- a/drivers/memory/samsung/exynos-srom.c +++ b/drivers/memory/samsung/exynos-srom.c @@ -139,8 +139,8 @@ static int exynos_srom_probe(struct platform_device *pdev) for_each_child_of_node(np, child) { if (exynos_srom_configure_bank(srom, child)) { dev_err(dev, - "Could not decode bank configuration for %s\n", - child->name); + "Could not decode bank configuration for %pOFn\n", + child); bad_bank_config = true; } } diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c index bd25faf6d13d..24afc36833bf 100644 --- a/drivers/memory/tegra/mc.c +++ b/drivers/memory/tegra/mc.c @@ -345,7 +345,7 @@ static int load_one_timing(struct tegra_mc *mc, err = of_property_read_u32(node, "clock-frequency", &tmp); if (err) { dev_err(mc->dev, - "timing %s: failed to read rate\n", node->name); + "timing %pOFn: failed to read rate\n", node); return err; } @@ -360,8 +360,8 @@ static int load_one_timing(struct tegra_mc *mc, mc->soc->num_emem_regs); if (err) { dev_err(mc->dev, - "timing %s: failed to read EMEM configuration\n", - node->name); + "timing %pOFn: failed to read EMEM configuration\n", + node); return err; } diff --git a/drivers/memory/tegra/tegra124-emc.c b/drivers/memory/tegra/tegra124-emc.c index 392dc8dd481f..eedb7d48e2ea 100644 --- a/drivers/memory/tegra/tegra124-emc.c +++ b/drivers/memory/tegra/tegra124-emc.c @@ -888,8 +888,8 @@ static int load_one_timing_from_dt(struct tegra_emc *emc, err = of_property_read_u32(node, "clock-frequency", &value); if (err) { - dev_err(emc->dev, "timing %s: failed to read rate: %d\n", - node->name, err); + dev_err(emc->dev, "timing %pOFn: failed to read rate: %d\n", + node, err); return err; } @@ -900,16 +900,16 @@ static int load_one_timing_from_dt(struct tegra_emc *emc, ARRAY_SIZE(timing->emc_burst_data)); if (err) { dev_err(emc->dev, - "timing %s: failed to read emc burst data: %d\n", - node->name, err); + "timing %pOFn: failed to read emc burst data: %d\n", + node, err); return err; } #define EMC_READ_PROP(prop, dtprop) { \ err = of_property_read_u32(node, dtprop, &timing->prop); \ if (err) { \ - dev_err(emc->dev, "timing %s: failed to read " #prop ": %d\n", \ - node->name, err); \ + dev_err(emc->dev, "timing %pOFn: failed to read " #prop ": %d\n", \ + node, err); \ return err; \ } \ } diff --git a/drivers/mtd/devices/powernv_flash.c b/drivers/mtd/devices/powernv_flash.c index 33593122e49b..22f753e555ac 100644 --- a/drivers/mtd/devices/powernv_flash.c +++ b/drivers/mtd/devices/powernv_flash.c @@ -212,7 +212,7 @@ static int powernv_flash_set_driver_info(struct device *dev, * Going to have to check what details I need to set and how to * get them */ - mtd->name = of_get_property(dev->of_node, "name", NULL); + mtd->name = devm_kasprintf(dev, GFP_KERNEL, "%pOFn", dev->of_node); mtd->type = MTD_NORFLASH; mtd->flags = MTD_WRITEABLE; mtd->size = size; diff --git a/drivers/of/address.c b/drivers/of/address.c index 7ddbf0a1ab86..2270373b30ab 100644 --- a/drivers/of/address.c +++ b/drivers/of/address.c @@ -110,8 +110,8 @@ static int of_bus_pci_match(struct device_node *np) * "vci" is for the /chaos bridge on 1st-gen PCI powermacs * "ht" is hypertransport */ - return !strcmp(np->type, "pci") || !strcmp(np->type, "pciex") || - !strcmp(np->type, "vci") || !strcmp(np->type, "ht"); + return of_node_is_type(np, "pci") || of_node_is_type(np, "pciex") || + of_node_is_type(np, "vci") || of_node_is_type(np, "ht"); } static void of_bus_pci_count_cells(struct device_node *np, @@ -371,7 +371,7 @@ EXPORT_SYMBOL(of_pci_range_to_resource); static int of_bus_isa_match(struct device_node *np) { - return !strcmp(np->name, "isa"); + return of_node_name_eq(np, "isa"); } static void of_bus_isa_count_cells(struct device_node *child, diff --git a/drivers/of/base.c b/drivers/of/base.c index 09692c9b32a7..5226e898476e 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -79,6 +79,13 @@ bool of_node_name_prefix(const struct device_node *np, const char *prefix) } EXPORT_SYMBOL(of_node_name_prefix); +static bool __of_node_is_type(const struct device_node *np, const char *type) +{ + const char *match = __of_get_property(np, "device_type", NULL); + + return np && match && type && !strcmp(match, type); +} + int of_n_addr_cells(struct device_node *np) { u32 cells; @@ -116,9 +123,6 @@ int __weak of_node_to_nid(struct device_node *np) } #endif -static struct device_node **phandle_cache; -static u32 phandle_cache_mask; - /* * Assumptions behind phandle_cache implementation: * - phandle property values are in a contiguous range of 1..n @@ -127,6 +131,66 @@ static u32 phandle_cache_mask; * - the phandle lookup overhead reduction provided by the cache * will likely be less */ + +static struct device_node **phandle_cache; +static u32 phandle_cache_mask; + +/* + * Caller must hold devtree_lock. + */ +static void __of_free_phandle_cache(void) +{ + u32 cache_entries = phandle_cache_mask + 1; + u32 k; + + if (!phandle_cache) + return; + + for (k = 0; k < cache_entries; k++) + of_node_put(phandle_cache[k]); + + kfree(phandle_cache); + phandle_cache = NULL; +} + +int of_free_phandle_cache(void) +{ + unsigned long flags; + + raw_spin_lock_irqsave(&devtree_lock, flags); + + __of_free_phandle_cache(); + + raw_spin_unlock_irqrestore(&devtree_lock, flags); + + return 0; +} +#if !defined(CONFIG_MODULES) +late_initcall_sync(of_free_phandle_cache); +#endif + +/* + * Caller must hold devtree_lock. + */ +void __of_free_phandle_cache_entry(phandle handle) +{ + phandle masked_handle; + struct device_node *np; + + if (!handle) + return; + + masked_handle = handle & phandle_cache_mask; + + if (phandle_cache) { + np = phandle_cache[masked_handle]; + if (np && handle == np->phandle) { + of_node_put(np); + phandle_cache[masked_handle] = NULL; + } + } +} + void of_populate_phandle_cache(void) { unsigned long flags; @@ -136,8 +200,7 @@ void of_populate_phandle_cache(void) raw_spin_lock_irqsave(&devtree_lock, flags); - kfree(phandle_cache); - phandle_cache = NULL; + __of_free_phandle_cache(); for_each_of_allnodes(np) if (np->phandle && np->phandle != OF_PHANDLE_ILLEGAL) @@ -155,30 +218,15 @@ void of_populate_phandle_cache(void) goto out; for_each_of_allnodes(np) - if (np->phandle && np->phandle != OF_PHANDLE_ILLEGAL) + if (np->phandle && np->phandle != OF_PHANDLE_ILLEGAL) { + of_node_get(np); phandle_cache[np->phandle & phandle_cache_mask] = np; + } out: raw_spin_unlock_irqrestore(&devtree_lock, flags); } -int of_free_phandle_cache(void) -{ - unsigned long flags; - - raw_spin_lock_irqsave(&devtree_lock, flags); - - kfree(phandle_cache); - phandle_cache = NULL; - - raw_spin_unlock_irqrestore(&devtree_lock, flags); - - return 0; -} -#if !defined(CONFIG_MODULES) -late_initcall_sync(of_free_phandle_cache); -#endif - void __init of_core_init(void) { struct device_node *np; @@ -482,14 +530,14 @@ static int __of_device_is_compatible(const struct device_node *device, /* Matching type is better than matching name */ if (type && type[0]) { - if (!device->type || of_node_cmp(type, device->type)) + if (!__of_node_is_type(device, type)) return 0; score += 2; } /* Matching name is a bit better than not */ if (name && name[0]) { - if (!device->name || of_node_cmp(name, device->name)) + if (!of_node_name_eq(device, name)) return 0; score++; } @@ -775,7 +823,7 @@ struct device_node *of_get_next_cpu_node(struct device_node *prev) } for (; next; next = next->sibling) { if (!(of_node_name_eq(next, "cpu") || - (next->type && !of_node_cmp(next->type, "cpu")))) + __of_node_is_type(next, "cpu"))) continue; if (of_node_get(next)) break; @@ -828,7 +876,7 @@ struct device_node *of_get_child_by_name(const struct device_node *node, struct device_node *child; for_each_child_of_node(node, child) - if (child->name && (of_node_cmp(child->name, name) == 0)) + if (of_node_name_eq(child, name)) break; return child; } @@ -954,8 +1002,7 @@ struct device_node *of_find_node_by_name(struct device_node *from, raw_spin_lock_irqsave(&devtree_lock, flags); for_each_of_allnodes_from(from, np) - if (np->name && (of_node_cmp(np->name, name) == 0) - && of_node_get(np)) + if (of_node_name_eq(np, name) && of_node_get(np)) break; of_node_put(from); raw_spin_unlock_irqrestore(&devtree_lock, flags); @@ -983,8 +1030,7 @@ struct device_node *of_find_node_by_type(struct device_node *from, raw_spin_lock_irqsave(&devtree_lock, flags); for_each_of_allnodes_from(from, np) - if (np->type && (of_node_cmp(np->type, type) == 0) - && of_node_get(np)) + if (__of_node_is_type(np, type) && of_node_get(np)) break; of_node_put(from); raw_spin_unlock_irqrestore(&devtree_lock, flags); @@ -1190,13 +1236,23 @@ struct device_node *of_find_node_by_phandle(phandle handle) if (phandle_cache[masked_handle] && handle == phandle_cache[masked_handle]->phandle) np = phandle_cache[masked_handle]; + if (np && of_node_check_flag(np, OF_DETACHED)) { + WARN_ON(1); /* did not uncache np on node removal */ + of_node_put(np); + phandle_cache[masked_handle] = NULL; + np = NULL; + } } if (!np) { for_each_of_allnodes(np) - if (np->phandle == handle) { - if (phandle_cache) + if (np->phandle == handle && + !of_node_check_flag(np, OF_DETACHED)) { + if (phandle_cache) { + /* will put when removed from cache */ + of_node_get(np); phandle_cache[masked_handle] = np; + } break; } } @@ -2108,9 +2164,9 @@ struct device_node *of_find_next_cache_node(const struct device_node *np) /* OF on pmac has nodes instead of properties named "l2-cache" * beneath CPU nodes. */ - if (IS_ENABLED(CONFIG_PPC_PMAC) && !strcmp(np->type, "cpu")) + if (IS_ENABLED(CONFIG_PPC_PMAC) && of_node_is_type(np, "cpu")) for_each_child_of_node(np, child) - if (!strcmp(child->type, "cache")) + if (of_node_is_type(child, "cache")) return child; return NULL; diff --git a/drivers/of/device.c b/drivers/of/device.c index 5592437bb3d1..3717f2a20d0d 100644 --- a/drivers/of/device.c +++ b/drivers/of/device.c @@ -211,7 +211,7 @@ static ssize_t of_device_get_modalias(struct device *dev, char *str, ssize_t len /* Name & Type */ /* %p eats all alphanum characters, so %c must be used here */ csize = snprintf(str, len, "of:N%pOFn%c%s", dev->of_node, 'T', - dev->of_node->type); + of_node_get_device_type(dev->of_node)); tsize = csize; len -= csize; if (str) @@ -281,7 +281,7 @@ EXPORT_SYMBOL_GPL(of_device_modalias); */ void of_device_uevent(struct device *dev, struct kobj_uevent_env *env) { - const char *compat; + const char *compat, *type; struct alias_prop *app; struct property *p; int seen = 0; @@ -291,8 +291,9 @@ void of_device_uevent(struct device *dev, struct kobj_uevent_env *env) add_uevent_var(env, "OF_NAME=%pOFn", dev->of_node); add_uevent_var(env, "OF_FULLNAME=%pOF", dev->of_node); - if (dev->of_node->type && strcmp("<NULL>", dev->of_node->type) != 0) - add_uevent_var(env, "OF_TYPE=%s", dev->of_node->type); + type = of_node_get_device_type(dev->of_node); + if (type) + add_uevent_var(env, "OF_TYPE=%s", type); /* Since the compatible field can contain pretty much anything * it's not really legal to split it out with commas. We split it diff --git a/drivers/of/dynamic.c b/drivers/of/dynamic.c index f4f8ed9b5454..a09c1c3cf831 100644 --- a/drivers/of/dynamic.c +++ b/drivers/of/dynamic.c @@ -205,15 +205,24 @@ static void __of_attach_node(struct device_node *np) const __be32 *phandle; int sz; - np->name = __of_get_property(np, "name", NULL) ? : "<NULL>"; - np->type = __of_get_property(np, "device_type", NULL) ? : "<NULL>"; - - phandle = __of_get_property(np, "phandle", &sz); - if (!phandle) - phandle = __of_get_property(np, "linux,phandle", &sz); - if (IS_ENABLED(CONFIG_PPC_PSERIES) && !phandle) - phandle = __of_get_property(np, "ibm,phandle", &sz); - np->phandle = (phandle && (sz >= 4)) ? be32_to_cpup(phandle) : 0; + if (!of_node_check_flag(np, OF_OVERLAY)) { + np->name = __of_get_property(np, "name", NULL); + np->type = __of_get_property(np, "device_type", NULL); + if (!np->name) + np->name = "<NULL>"; + if (!np->type) + np->type = "<NULL>"; + + phandle = __of_get_property(np, "phandle", &sz); + if (!phandle) + phandle = __of_get_property(np, "linux,phandle", &sz); + if (IS_ENABLED(CONFIG_PPC_PSERIES) && !phandle) + phandle = __of_get_property(np, "ibm,phandle", &sz); + if (phandle && (sz >= 4)) + np->phandle = be32_to_cpup(phandle); + else + np->phandle = 0; + } np->child = NULL; np->sibling = np->parent->child; @@ -268,13 +277,13 @@ void __of_detach_node(struct device_node *np) } of_node_set_flag(np, OF_DETACHED); + + /* race with of_find_node_by_phandle() prevented by devtree_lock */ + __of_free_phandle_cache_entry(np->phandle); } /** * of_detach_node() - "Unplug" a node from the device tree. - * - * The caller must hold a reference to the node. The memory associated with - * the node is not freed until its refcount goes to zero. */ int of_detach_node(struct device_node *np) { @@ -330,6 +339,25 @@ void of_node_release(struct kobject *kobj) if (!of_node_check_flag(node, OF_DYNAMIC)) return; + if (of_node_check_flag(node, OF_OVERLAY)) { + + if (!of_node_check_flag(node, OF_OVERLAY_FREE_CSET)) { + /* premature refcount of zero, do not free memory */ + pr_err("ERROR: memory leak before free overlay changeset, %pOF\n", + node); + return; + } + + /* + * If node->properties non-empty then properties were added + * to this node either by different overlay that has not + * yet been removed, or by a non-overlay mechanism. + */ + if (node->properties) + pr_err("ERROR: %s(), unexpected properties in %pOF\n", + __func__, node); + } + property_list_free(node->properties); property_list_free(node->deadprops); @@ -434,6 +462,16 @@ struct device_node *__of_node_dup(const struct device_node *np, static void __of_changeset_entry_destroy(struct of_changeset_entry *ce) { + if (ce->action == OF_RECONFIG_ATTACH_NODE && + of_node_check_flag(ce->np, OF_OVERLAY)) { + if (kref_read(&ce->np->kobj.kref) > 1) { + pr_err("ERROR: memory leak, expected refcount 1 instead of %d, of_node_get()/of_node_put() unbalanced - destroy cset entry: attach overlay node %pOF\n", + kref_read(&ce->np->kobj.kref), ce->np); + } else { + of_node_set_flag(ce->np, OF_OVERLAY_FREE_CSET); + } + } + of_node_put(ce->np); list_del(&ce->node); kfree(ce); diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c index bb532aae0d92..7099c652c6a5 100644 --- a/drivers/of/fdt.c +++ b/drivers/of/fdt.c @@ -891,15 +891,20 @@ const void * __init of_flat_dt_match_machine(const void *default_match, } #ifdef CONFIG_BLK_DEV_INITRD -#ifndef __early_init_dt_declare_initrd static void __early_init_dt_declare_initrd(unsigned long start, unsigned long end) { - initrd_start = (unsigned long)__va(start); - initrd_end = (unsigned long)__va(end); - initrd_below_start_ok = 1; + /* ARM64 would cause a BUG to occur here when CONFIG_DEBUG_VM is + * enabled since __va() is called too early. ARM64 does make use + * of phys_initrd_start/phys_initrd_size so we can skip this + * conversion. + */ + if (!IS_ENABLED(CONFIG_ARM64)) { + initrd_start = (unsigned long)__va(start); + initrd_end = (unsigned long)__va(end); + initrd_below_start_ok = 1; + } } -#endif /** * early_init_dt_check_for_initrd - Decode initrd location from flat tree @@ -924,6 +929,8 @@ static void __init early_init_dt_check_for_initrd(unsigned long node) end = of_read_number(prop, len/4); __early_init_dt_declare_initrd(start, end); + phys_initrd_start = start; + phys_initrd_size = end - start; pr_debug("initrd_start=0x%llx initrd_end=0x%llx\n", (unsigned long long)start, (unsigned long long)end); @@ -1200,8 +1207,12 @@ bool __init early_init_dt_verify(void *params) void __init early_init_dt_scan_nodes(void) { + int rc = 0; + /* Retrieve various information from the /chosen node */ - of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line); + rc = of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line); + if (!rc) + pr_warn("No chosen node found, continuing without\n"); /* Initialize {size,address}-cells info */ of_scan_flat_dt(early_init_dt_scan_root, NULL); diff --git a/drivers/of/kobj.c b/drivers/of/kobj.c index 7a0a18980b98..c72eef988041 100644 --- a/drivers/of/kobj.c +++ b/drivers/of/kobj.c @@ -133,6 +133,9 @@ int __of_attach_node_sysfs(struct device_node *np) } if (!name) return -ENOMEM; + + of_node_get(np); + rc = kobject_add(&np->kobj, parent, "%s", name); kfree(name); if (rc) @@ -159,6 +162,5 @@ void __of_detach_node_sysfs(struct device_node *np) kobject_del(&np->kobj); } - /* finally remove the kobj_init ref */ of_node_put(np); } diff --git a/drivers/of/of_private.h b/drivers/of/of_private.h index 5d1567025358..24786818e32e 100644 --- a/drivers/of/of_private.h +++ b/drivers/of/of_private.h @@ -84,6 +84,10 @@ static inline void __of_detach_node_sysfs(struct device_node *np) {} int of_resolve_phandles(struct device_node *tree); #endif +#if defined(CONFIG_OF_DYNAMIC) +void __of_free_phandle_cache_entry(phandle handle); +#endif + #if defined(CONFIG_OF_OVERLAY) void of_overlay_mutex_lock(void); void of_overlay_mutex_unlock(void); diff --git a/drivers/of/overlay.c b/drivers/of/overlay.c index 42b1f73ac5f6..2b5ac43a5690 100644 --- a/drivers/of/overlay.c +++ b/drivers/of/overlay.c @@ -24,13 +24,33 @@ #include "of_private.h" /** + * struct target - info about current target node as recursing through overlay + * @np: node where current level of overlay will be applied + * @in_livetree: @np is a node in the live devicetree + * + * Used in the algorithm to create the portion of a changeset that describes + * an overlay fragment, which is a devicetree subtree. Initially @np is a node + * in the live devicetree where the overlay subtree is targeted to be grafted + * into. When recursing to the next level of the overlay subtree, the target + * also recurses to the next level of the live devicetree, as long as overlay + * subtree node also exists in the live devicetree. When a node in the overlay + * subtree does not exist at the same level in the live devicetree, target->np + * points to a newly allocated node, and all subsequent targets in the subtree + * will be newly allocated nodes. + */ +struct target { + struct device_node *np; + bool in_livetree; +}; + +/** * struct fragment - info about fragment nodes in overlay expanded device tree * @target: target of the overlay operation * @overlay: pointer to the __overlay__ node */ struct fragment { - struct device_node *target; struct device_node *overlay; + struct device_node *target; }; /** @@ -72,8 +92,7 @@ static int devicetree_corrupt(void) } static int build_changeset_next_level(struct overlay_changeset *ovcs, - struct device_node *target_node, - const struct device_node *overlay_node); + struct target *target, const struct device_node *overlay_node); /* * of_resolve_phandles() finds the largest phandle in the live tree. @@ -257,15 +276,23 @@ err_free_target_path: /** * add_changeset_property() - add @overlay_prop to overlay changeset * @ovcs: overlay changeset - * @target_node: where to place @overlay_prop in live tree + * @target: where @overlay_prop will be placed * @overlay_prop: property to add or update, from overlay tree * @is_symbols_prop: 1 if @overlay_prop is from node "/__symbols__" * - * If @overlay_prop does not already exist in @target_node, add changeset entry - * to add @overlay_prop in @target_node, else add changeset entry to update + * If @overlay_prop does not already exist in live devicetree, add changeset + * entry to add @overlay_prop in @target, else add changeset entry to update * value of @overlay_prop. * - * Some special properties are not updated (no error returned). + * @target may be either in the live devicetree or in a new subtree that + * is contained in the changeset. + * + * Some special properties are not added or updated (no error returned): + * "name", "phandle", "linux,phandle". + * + * Properties "#address-cells" and "#size-cells" are not updated if they + * are already in the live tree, but if present in the live tree, the values + * in the overlay must match the values in the live tree. * * Update of property in symbols node is not allowed. * @@ -273,19 +300,23 @@ err_free_target_path: * invalid @overlay. */ static int add_changeset_property(struct overlay_changeset *ovcs, - struct device_node *target_node, - struct property *overlay_prop, + struct target *target, struct property *overlay_prop, bool is_symbols_prop) { struct property *new_prop = NULL, *prop; int ret = 0; + bool check_for_non_overlay_node = false; - prop = of_find_property(target_node, overlay_prop->name, NULL); + if (target->in_livetree) + if (!of_prop_cmp(overlay_prop->name, "name") || + !of_prop_cmp(overlay_prop->name, "phandle") || + !of_prop_cmp(overlay_prop->name, "linux,phandle")) + return 0; - if (!of_prop_cmp(overlay_prop->name, "name") || - !of_prop_cmp(overlay_prop->name, "phandle") || - !of_prop_cmp(overlay_prop->name, "linux,phandle")) - return 0; + if (target->in_livetree) + prop = of_find_property(target->np, overlay_prop->name, NULL); + else + prop = NULL; if (is_symbols_prop) { if (prop) @@ -298,12 +329,36 @@ static int add_changeset_property(struct overlay_changeset *ovcs, if (!new_prop) return -ENOMEM; - if (!prop) - ret = of_changeset_add_property(&ovcs->cset, target_node, + if (!prop) { + check_for_non_overlay_node = true; + if (!target->in_livetree) { + new_prop->next = target->np->deadprops; + target->np->deadprops = new_prop; + } + ret = of_changeset_add_property(&ovcs->cset, target->np, new_prop); - else - ret = of_changeset_update_property(&ovcs->cset, target_node, + } else if (!of_prop_cmp(prop->name, "#address-cells")) { + if (!of_prop_val_eq(prop, new_prop)) { + pr_err("ERROR: changing value of #address-cells is not allowed in %pOF\n", + target->np); + ret = -EINVAL; + } + } else if (!of_prop_cmp(prop->name, "#size-cells")) { + if (!of_prop_val_eq(prop, new_prop)) { + pr_err("ERROR: changing value of #size-cells is not allowed in %pOF\n", + target->np); + ret = -EINVAL; + } + } else { + check_for_non_overlay_node = true; + ret = of_changeset_update_property(&ovcs->cset, target->np, new_prop); + } + + if (check_for_non_overlay_node && + !of_node_check_flag(target->np, OF_OVERLAY)) + pr_err("WARNING: memory leak will occur if overlay removed, property: %pOF/%s\n", + target->np, new_prop->name); if (ret) { kfree(new_prop->name); @@ -315,14 +370,14 @@ static int add_changeset_property(struct overlay_changeset *ovcs, /** * add_changeset_node() - add @node (and children) to overlay changeset - * @ovcs: overlay changeset - * @target_node: where to place @node in live tree - * @node: node from within overlay device tree fragment + * @ovcs: overlay changeset + * @target: where @node will be placed in live tree or changeset + * @node: node from within overlay device tree fragment * - * If @node does not already exist in @target_node, add changeset entry - * to add @node in @target_node. + * If @node does not already exist in @target, add changeset entry + * to add @node in @target. * - * If @node already exists in @target_node, and the existing node has + * If @node already exists in @target, and the existing node has * a phandle, the overlay node is not allowed to have a phandle. * * If @node has child nodes, add the children recursively via @@ -342,49 +397,65 @@ static int add_changeset_property(struct overlay_changeset *ovcs, * a live devicetree created from Open Firmware. * * NOTE_2: Multiple mods of created nodes not supported. - * If more than one fragment contains a node that does not already exist - * in the live tree, then for each fragment of_changeset_attach_node() - * will add a changeset entry to add the node. When the changeset is - * applied, __of_attach_node() will attach the node twice (once for - * each fragment). At this point the device tree will be corrupted. - * - * TODO: add integrity check to ensure that multiple fragments do not - * create the same node. * * Returns 0 on success, -ENOMEM if memory allocation failure, or -EINVAL if * invalid @overlay. */ static int add_changeset_node(struct overlay_changeset *ovcs, - struct device_node *target_node, struct device_node *node) + struct target *target, struct device_node *node) { const char *node_kbasename; + const __be32 *phandle; struct device_node *tchild; - int ret = 0; + struct target target_child; + int ret = 0, size; node_kbasename = kbasename(node->full_name); - for_each_child_of_node(target_node, tchild) + for_each_child_of_node(target->np, tchild) if (!of_node_cmp(node_kbasename, kbasename(tchild->full_name))) break; if (!tchild) { - tchild = __of_node_dup(node, node_kbasename); + tchild = __of_node_dup(NULL, node_kbasename); if (!tchild) return -ENOMEM; - tchild->parent = target_node; + tchild->parent = target->np; + tchild->name = __of_get_property(node, "name", NULL); + tchild->type = __of_get_property(node, "device_type", NULL); + + if (!tchild->name) + tchild->name = "<NULL>"; + if (!tchild->type) + tchild->type = "<NULL>"; + + /* ignore obsolete "linux,phandle" */ + phandle = __of_get_property(node, "phandle", &size); + if (phandle && (size == 4)) + tchild->phandle = be32_to_cpup(phandle); + + of_node_set_flag(tchild, OF_OVERLAY); ret = of_changeset_attach_node(&ovcs->cset, tchild); if (ret) return ret; - return build_changeset_next_level(ovcs, tchild, node); + target_child.np = tchild; + target_child.in_livetree = false; + + ret = build_changeset_next_level(ovcs, &target_child, node); + of_node_put(tchild); + return ret; } - if (node->phandle && tchild->phandle) + if (node->phandle && tchild->phandle) { ret = -EINVAL; - else - ret = build_changeset_next_level(ovcs, tchild, node); + } else { + target_child.np = tchild; + target_child.in_livetree = target->in_livetree; + ret = build_changeset_next_level(ovcs, &target_child, node); + } of_node_put(tchild); return ret; @@ -393,7 +464,7 @@ static int add_changeset_node(struct overlay_changeset *ovcs, /** * build_changeset_next_level() - add level of overlay changeset * @ovcs: overlay changeset - * @target_node: where to place @overlay_node in live tree + * @target: where to place @overlay_node in live tree * @overlay_node: node from within an overlay device tree fragment * * Add the properties (if any) and nodes (if any) from @overlay_node to the @@ -406,27 +477,26 @@ static int add_changeset_node(struct overlay_changeset *ovcs, * invalid @overlay_node. */ static int build_changeset_next_level(struct overlay_changeset *ovcs, - struct device_node *target_node, - const struct device_node *overlay_node) + struct target *target, const struct device_node *overlay_node) { struct device_node *child; struct property *prop; int ret; for_each_property_of_node(overlay_node, prop) { - ret = add_changeset_property(ovcs, target_node, prop, 0); + ret = add_changeset_property(ovcs, target, prop, 0); if (ret) { pr_debug("Failed to apply prop @%pOF/%s, err=%d\n", - target_node, prop->name, ret); + target->np, prop->name, ret); return ret; } } for_each_child_of_node(overlay_node, child) { - ret = add_changeset_node(ovcs, target_node, child); + ret = add_changeset_node(ovcs, target, child); if (ret) { pr_debug("Failed to apply node @%pOF/%pOFn, err=%d\n", - target_node, child, ret); + target->np, child, ret); of_node_put(child); return ret; } @@ -439,17 +509,17 @@ static int build_changeset_next_level(struct overlay_changeset *ovcs, * Add the properties from __overlay__ node to the @ovcs->cset changeset. */ static int build_changeset_symbols_node(struct overlay_changeset *ovcs, - struct device_node *target_node, + struct target *target, const struct device_node *overlay_symbols_node) { struct property *prop; int ret; for_each_property_of_node(overlay_symbols_node, prop) { - ret = add_changeset_property(ovcs, target_node, prop, 1); + ret = add_changeset_property(ovcs, target, prop, 1); if (ret) { - pr_debug("Failed to apply prop @%pOF/%s, err=%d\n", - target_node, prop->name, ret); + pr_debug("Failed to apply symbols prop @%pOF/%s, err=%d\n", + target->np, prop->name, ret); return ret; } } @@ -457,6 +527,98 @@ static int build_changeset_symbols_node(struct overlay_changeset *ovcs, return 0; } +static int find_dup_cset_node_entry(struct overlay_changeset *ovcs, + struct of_changeset_entry *ce_1) +{ + struct of_changeset_entry *ce_2; + char *fn_1, *fn_2; + int node_path_match; + + if (ce_1->action != OF_RECONFIG_ATTACH_NODE && + ce_1->action != OF_RECONFIG_DETACH_NODE) + return 0; + + ce_2 = ce_1; + list_for_each_entry_continue(ce_2, &ovcs->cset.entries, node) { + if ((ce_2->action != OF_RECONFIG_ATTACH_NODE && + ce_2->action != OF_RECONFIG_DETACH_NODE) || + of_node_cmp(ce_1->np->full_name, ce_2->np->full_name)) + continue; + + fn_1 = kasprintf(GFP_KERNEL, "%pOF", ce_1->np); + fn_2 = kasprintf(GFP_KERNEL, "%pOF", ce_2->np); + node_path_match = !strcmp(fn_1, fn_2); + kfree(fn_1); + kfree(fn_2); + if (node_path_match) { + pr_err("ERROR: multiple fragments add and/or delete node %pOF\n", + ce_1->np); + return -EINVAL; + } + } + + return 0; +} + +static int find_dup_cset_prop(struct overlay_changeset *ovcs, + struct of_changeset_entry *ce_1) +{ + struct of_changeset_entry *ce_2; + char *fn_1, *fn_2; + int node_path_match; + + if (ce_1->action != OF_RECONFIG_ADD_PROPERTY && + ce_1->action != OF_RECONFIG_REMOVE_PROPERTY && + ce_1->action != OF_RECONFIG_UPDATE_PROPERTY) + return 0; + + ce_2 = ce_1; + list_for_each_entry_continue(ce_2, &ovcs->cset.entries, node) { + if ((ce_2->action != OF_RECONFIG_ADD_PROPERTY && + ce_2->action != OF_RECONFIG_REMOVE_PROPERTY && + ce_2->action != OF_RECONFIG_UPDATE_PROPERTY) || + of_node_cmp(ce_1->np->full_name, ce_2->np->full_name)) + continue; + + fn_1 = kasprintf(GFP_KERNEL, "%pOF", ce_1->np); + fn_2 = kasprintf(GFP_KERNEL, "%pOF", ce_2->np); + node_path_match = !strcmp(fn_1, fn_2); + kfree(fn_1); + kfree(fn_2); + if (node_path_match && + !of_prop_cmp(ce_1->prop->name, ce_2->prop->name)) { + pr_err("ERROR: multiple fragments add, update, and/or delete property %pOF/%s\n", + ce_1->np, ce_1->prop->name); + return -EINVAL; + } + } + + return 0; +} + +/** + * changeset_dup_entry_check() - check for duplicate entries + * @ovcs: Overlay changeset + * + * Check changeset @ovcs->cset for multiple {add or delete} node entries for + * the same node or duplicate {add, delete, or update} properties entries + * for the same property. + * + * Returns 0 on success, or -EINVAL if duplicate changeset entry found. + */ +static int changeset_dup_entry_check(struct overlay_changeset *ovcs) +{ + struct of_changeset_entry *ce_1; + int dup_entry = 0; + + list_for_each_entry(ce_1, &ovcs->cset.entries, node) { + dup_entry |= find_dup_cset_node_entry(ovcs, ce_1); + dup_entry |= find_dup_cset_prop(ovcs, ce_1); + } + + return dup_entry ? -EINVAL : 0; +} + /** * build_changeset() - populate overlay changeset in @ovcs from @ovcs->fragments * @ovcs: Overlay changeset @@ -472,6 +634,7 @@ static int build_changeset_symbols_node(struct overlay_changeset *ovcs, static int build_changeset(struct overlay_changeset *ovcs) { struct fragment *fragment; + struct target target; int fragments_count, i, ret; /* @@ -486,25 +649,32 @@ static int build_changeset(struct overlay_changeset *ovcs) for (i = 0; i < fragments_count; i++) { fragment = &ovcs->fragments[i]; - ret = build_changeset_next_level(ovcs, fragment->target, + target.np = fragment->target; + target.in_livetree = true; + ret = build_changeset_next_level(ovcs, &target, fragment->overlay); if (ret) { - pr_debug("apply failed '%pOF'\n", fragment->target); + pr_debug("fragment apply failed '%pOF'\n", + fragment->target); return ret; } } if (ovcs->symbols_fragment) { fragment = &ovcs->fragments[ovcs->count - 1]; - ret = build_changeset_symbols_node(ovcs, fragment->target, + + target.np = fragment->target; + target.in_livetree = true; + ret = build_changeset_symbols_node(ovcs, &target, fragment->overlay); if (ret) { - pr_debug("apply failed '%pOF'\n", fragment->target); + pr_debug("symbols fragment apply failed '%pOF'\n", + fragment->target); return ret; } } - return 0; + return changeset_dup_entry_check(ovcs); } /* @@ -514,7 +684,7 @@ static int build_changeset(struct overlay_changeset *ovcs) * 1) "target" property containing the phandle of the target * 2) "target-path" property containing the path of the target */ -static struct device_node *find_target_node(struct device_node *info_node) +static struct device_node *find_target(struct device_node *info_node) { struct device_node *node; const char *path; @@ -620,7 +790,7 @@ static int init_overlay_changeset(struct overlay_changeset *ovcs, fragment = &fragments[cnt]; fragment->overlay = overlay_node; - fragment->target = find_target_node(node); + fragment->target = find_target(node); if (!fragment->target) { of_node_put(fragment->overlay); ret = -EINVAL; @@ -808,7 +978,7 @@ static int of_overlay_apply(const void *fdt, struct device_node *tree, ret = __of_changeset_apply_notify(&ovcs->cset); if (ret) - pr_err("overlay changeset entry notify error %d\n", ret); + pr_err("overlay apply changeset entry notify error %d\n", ret); /* notify failure is not fatal, continue */ list_add_tail(&ovcs->ovcs_list, &ovcs_list); @@ -1067,7 +1237,7 @@ int of_overlay_remove(int *ovcs_id) ret = __of_changeset_revert_notify(&ovcs->cset); if (ret) - pr_err("overlay changeset entry notify error %d\n", ret); + pr_err("overlay remove changeset entry notify error %d\n", ret); /* notify failure is not fatal, continue */ *ovcs_id = 0; diff --git a/drivers/of/pdt.c b/drivers/of/pdt.c index c1633041621d..d3185063d369 100644 --- a/drivers/of/pdt.c +++ b/drivers/of/pdt.c @@ -21,8 +21,6 @@ static struct of_pdt_ops *of_pdt_prom_ops __initdata; -void __initdata (*of_pdt_build_more)(struct device_node *dp); - #if defined(CONFIG_SPARC) unsigned int of_pdt_unique_id __initdata; @@ -189,9 +187,6 @@ static struct device_node * __init of_pdt_build_tree(struct device_node *parent, dp->child = of_pdt_build_tree(dp, of_pdt_prom_ops->getchild(node)); - if (of_pdt_build_more) - of_pdt_build_more(dp); - node = of_pdt_prom_ops->getsibling(node); } diff --git a/drivers/of/property.c b/drivers/of/property.c index f46828e3b082..08430031bd28 100644 --- a/drivers/of/property.c +++ b/drivers/of/property.c @@ -571,7 +571,7 @@ struct device_node *of_graph_get_port_by_id(struct device_node *parent, u32 id) for_each_child_of_node(parent, port) { u32 port_id = 0; - if (of_node_cmp(port->name, "port") != 0) + if (!of_node_name_eq(port, "port")) continue; of_property_read_u32(port, "reg", &port_id); if (id == port_id) @@ -646,7 +646,7 @@ struct device_node *of_graph_get_next_endpoint(const struct device_node *parent, port = of_get_next_child(parent, port); if (!port) return NULL; - } while (of_node_cmp(port->name, "port")); + } while (!of_node_name_eq(port, "port")); } } EXPORT_SYMBOL(of_graph_get_next_endpoint); @@ -715,7 +715,7 @@ struct device_node *of_graph_get_port_parent(struct device_node *node) /* Walk 3 levels up only if there is 'ports' node. */ for (depth = 3; depth && node; depth--) { node = of_get_next_parent(node); - if (depth == 2 && of_node_cmp(node->name, "ports")) + if (depth == 2 && !of_node_name_eq(node, "ports")) break; } return node; @@ -893,7 +893,7 @@ of_fwnode_get_named_child_node(const struct fwnode_handle *fwnode, struct device_node *child; for_each_available_child_of_node(node, child) - if (!of_node_cmp(child->name, childname)) + if (of_node_name_eq(child, childname)) return of_fwnode_handle(child); return NULL; @@ -955,7 +955,7 @@ of_fwnode_graph_get_port_parent(struct fwnode_handle *fwnode) return NULL; /* Is this the "ports" node? If not, it's the port parent. */ - if (of_node_cmp(np->name, "ports")) + if (!of_node_name_eq(np, "ports")) return of_fwnode_handle(np); return of_fwnode_handle(of_get_next_parent(np)); diff --git a/drivers/of/resolver.c b/drivers/of/resolver.c index 7edfac6f1914..c1b67dd7cd6e 100644 --- a/drivers/of/resolver.c +++ b/drivers/of/resolver.c @@ -281,7 +281,7 @@ int of_resolve_phandles(struct device_node *overlay) adjust_overlay_phandles(overlay, phandle_delta); for_each_child_of_node(overlay, local_fixups) - if (!of_node_cmp(local_fixups->name, "__local_fixups__")) + if (of_node_name_eq(local_fixups, "__local_fixups__")) break; err = adjust_local_phandle_references(local_fixups, overlay, phandle_delta); @@ -291,7 +291,7 @@ int of_resolve_phandles(struct device_node *overlay) overlay_fixups = NULL; for_each_child_of_node(overlay, child) { - if (!of_node_cmp(child->name, "__fixups__")) + if (of_node_name_eq(child, "__fixups__")) overlay_fixups = child; } diff --git a/drivers/of/unittest-data/Makefile b/drivers/of/unittest-data/Makefile index 013d85e694c6..9b6807065827 100644 --- a/drivers/of/unittest-data/Makefile +++ b/drivers/of/unittest-data/Makefile @@ -17,6 +17,8 @@ obj-$(CONFIG_OF_OVERLAY) += overlay.dtb.o \ overlay_12.dtb.o \ overlay_13.dtb.o \ overlay_15.dtb.o \ + overlay_bad_add_dup_node.dtb.o \ + overlay_bad_add_dup_prop.dtb.o \ overlay_bad_phandle.dtb.o \ overlay_bad_symbol.dtb.o \ overlay_base.dtb.o diff --git a/drivers/of/unittest-data/overlay_bad_add_dup_node.dts b/drivers/of/unittest-data/overlay_bad_add_dup_node.dts new file mode 100644 index 000000000000..145dfc3b1024 --- /dev/null +++ b/drivers/of/unittest-data/overlay_bad_add_dup_node.dts @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; +/plugin/; + +/* + * &electric_1/motor-1 and &spin_ctrl_1 are the same node: + * /testcase-data-2/substation@100/motor-1 + * + * Thus the new node "controller" in each fragment will + * result in an attempt to add the same node twice. + * This will result in an error and the overlay apply + * will fail. + */ + +&electric_1 { + + motor-1 { + controller { + power_bus = < 0x1 0x2 >; + }; + }; +}; + +&spin_ctrl_1 { + controller { + power_bus_emergency = < 0x101 0x102 >; + }; +}; diff --git a/drivers/of/unittest-data/overlay_bad_add_dup_prop.dts b/drivers/of/unittest-data/overlay_bad_add_dup_prop.dts new file mode 100644 index 000000000000..c190da54f175 --- /dev/null +++ b/drivers/of/unittest-data/overlay_bad_add_dup_prop.dts @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; +/plugin/; + +/* + * &electric_1/motor-1 and &spin_ctrl_1 are the same node: + * /testcase-data-2/substation@100/motor-1 + * + * Thus the property "rpm_avail" in each fragment will + * result in an attempt to update the same property twice. + * This will result in an error and the overlay apply + * will fail. + */ + +&electric_1 { + + motor-1 { + rpm_avail = < 100 >; + }; +}; + +&spin_ctrl_1 { + rpm_avail = < 100 200 >; +}; diff --git a/drivers/of/unittest-data/overlay_base.dts b/drivers/of/unittest-data/overlay_base.dts index 820b79ca378a..99ab9d12d00b 100644 --- a/drivers/of/unittest-data/overlay_base.dts +++ b/drivers/of/unittest-data/overlay_base.dts @@ -30,6 +30,7 @@ spin_ctrl_1: motor-1 { compatible = "ot,ferris-wheel-motor"; spin = "clockwise"; + rpm_avail = < 50 >; }; spin_ctrl_2: motor-8 { diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c index 49ae2aa744d6..84427384654d 100644 --- a/drivers/of/unittest.c +++ b/drivers/of/unittest.c @@ -379,6 +379,7 @@ static void __init of_unittest_parse_phandle_with_args(void) for (i = 0; i < 8; i++) { bool passed = true; + memset(&args, 0, sizeof(args)); rc = of_parse_phandle_with_args(np, "phandle-list", "#phandle-cells", i, &args); @@ -432,6 +433,7 @@ static void __init of_unittest_parse_phandle_with_args(void) } /* Check for missing list property */ + memset(&args, 0, sizeof(args)); rc = of_parse_phandle_with_args(np, "phandle-list-missing", "#phandle-cells", 0, &args); unittest(rc == -ENOENT, "expected:%i got:%i\n", -ENOENT, rc); @@ -440,6 +442,7 @@ static void __init of_unittest_parse_phandle_with_args(void) unittest(rc == -ENOENT, "expected:%i got:%i\n", -ENOENT, rc); /* Check for missing cells property */ + memset(&args, 0, sizeof(args)); rc = of_parse_phandle_with_args(np, "phandle-list", "#phandle-cells-missing", 0, &args); unittest(rc == -EINVAL, "expected:%i got:%i\n", -EINVAL, rc); @@ -448,6 +451,7 @@ static void __init of_unittest_parse_phandle_with_args(void) unittest(rc == -EINVAL, "expected:%i got:%i\n", -EINVAL, rc); /* Check for bad phandle in list */ + memset(&args, 0, sizeof(args)); rc = of_parse_phandle_with_args(np, "phandle-list-bad-phandle", "#phandle-cells", 0, &args); unittest(rc == -EINVAL, "expected:%i got:%i\n", -EINVAL, rc); @@ -456,6 +460,7 @@ static void __init of_unittest_parse_phandle_with_args(void) unittest(rc == -EINVAL, "expected:%i got:%i\n", -EINVAL, rc); /* Check for incorrectly formed argument list */ + memset(&args, 0, sizeof(args)); rc = of_parse_phandle_with_args(np, "phandle-list-bad-args", "#phandle-cells", 1, &args); unittest(rc == -EINVAL, "expected:%i got:%i\n", -EINVAL, rc); @@ -506,6 +511,7 @@ static void __init of_unittest_parse_phandle_with_args_map(void) for (i = 0; i < 8; i++) { bool passed = true; + memset(&args, 0, sizeof(args)); rc = of_parse_phandle_with_args_map(np, "phandle-list", "phandle", i, &args); @@ -563,21 +569,25 @@ static void __init of_unittest_parse_phandle_with_args_map(void) } /* Check for missing list property */ + memset(&args, 0, sizeof(args)); rc = of_parse_phandle_with_args_map(np, "phandle-list-missing", "phandle", 0, &args); unittest(rc == -ENOENT, "expected:%i got:%i\n", -ENOENT, rc); /* Check for missing cells,map,mask property */ + memset(&args, 0, sizeof(args)); rc = of_parse_phandle_with_args_map(np, "phandle-list", "phandle-missing", 0, &args); unittest(rc == -EINVAL, "expected:%i got:%i\n", -EINVAL, rc); /* Check for bad phandle in list */ + memset(&args, 0, sizeof(args)); rc = of_parse_phandle_with_args_map(np, "phandle-list-bad-phandle", "phandle", 0, &args); unittest(rc == -EINVAL, "expected:%i got:%i\n", -EINVAL, rc); /* Check for incorrectly formed argument list */ + memset(&args, 0, sizeof(args)); rc = of_parse_phandle_with_args_map(np, "phandle-list-bad-args", "phandle", 1, &args); unittest(rc == -EINVAL, "expected:%i got:%i\n", -EINVAL, rc); @@ -787,7 +797,7 @@ static void __init of_unittest_parse_interrupts(void) for (i = 0; i < 4; i++) { bool passed = true; - args.args_count = 0; + memset(&args, 0, sizeof(args)); rc = of_irq_parse_one(np, i, &args); passed &= !rc; @@ -808,7 +818,7 @@ static void __init of_unittest_parse_interrupts(void) for (i = 0; i < 4; i++) { bool passed = true; - args.args_count = 0; + memset(&args, 0, sizeof(args)); rc = of_irq_parse_one(np, i, &args); /* Test the values from tests-phandle.dtsi */ @@ -864,6 +874,7 @@ static void __init of_unittest_parse_interrupts_extended(void) for (i = 0; i < 7; i++) { bool passed = true; + memset(&args, 0, sizeof(args)); rc = of_irq_parse_one(np, i, &args); /* Test the values from tests-phandle.dtsi */ @@ -1071,20 +1082,44 @@ static void __init of_unittest_platform_populate(void) * of np into dup node (present in live tree) and * updates parent of children of np to dup. * - * @np: node already present in live tree + * @np: node whose properties are being added to the live tree * @dup: node present in live tree to be updated */ static void update_node_properties(struct device_node *np, struct device_node *dup) { struct property *prop; + struct property *save_next; struct device_node *child; - - for_each_property_of_node(np, prop) - of_add_property(dup, prop); + int ret; for_each_child_of_node(np, child) child->parent = dup; + + /* + * "unittest internal error: unable to add testdata property" + * + * If this message reports a property in node '/__symbols__' then + * the respective unittest overlay contains a label that has the + * same name as a label in the live devicetree. The label will + * be in the live devicetree only if the devicetree source was + * compiled with the '-@' option. If you encounter this error, + * please consider renaming __all__ of the labels in the unittest + * overlay dts files with an odd prefix that is unlikely to be + * used in a real devicetree. + */ + + /* + * open code for_each_property_of_node() because of_add_property() + * sets prop->next to NULL + */ + for (prop = np->properties; prop != NULL; prop = save_next) { + save_next = prop->next; + ret = of_add_property(dup, prop); + if (ret) + pr_err("unittest internal error: unable to add testdata property %pOF/%s", + np, prop->name); + } } /** @@ -1093,18 +1128,23 @@ static void update_node_properties(struct device_node *np, * * @np: Node to attach to live tree */ -static int attach_node_and_children(struct device_node *np) +static void attach_node_and_children(struct device_node *np) { struct device_node *next, *dup, *child; unsigned long flags; const char *full_name; full_name = kasprintf(GFP_KERNEL, "%pOF", np); + + if (!strcmp(full_name, "/__local_fixups__") || + !strcmp(full_name, "/__fixups__")) + return; + dup = of_find_node_by_path(full_name); kfree(full_name); if (dup) { update_node_properties(np, dup); - return 0; + return; } child = np->child; @@ -1125,8 +1165,6 @@ static int attach_node_and_children(struct device_node *np) attach_node_and_children(child); child = next; } - - return 0; } /** @@ -1433,8 +1471,7 @@ static void of_unittest_destroy_tracked_overlays(void) } while (defers > 0); } -static int __init of_unittest_apply_overlay(int overlay_nr, int unittest_nr, - int *overlay_id) +static int __init of_unittest_apply_overlay(int overlay_nr, int *overlay_id) { const char *overlay_name; @@ -1467,7 +1504,7 @@ static int __init of_unittest_apply_overlay_check(int overlay_nr, } ovcs_id = 0; - ret = of_unittest_apply_overlay(overlay_nr, unittest_nr, &ovcs_id); + ret = of_unittest_apply_overlay(overlay_nr, &ovcs_id); if (ret != 0) { /* of_unittest_apply_overlay already called unittest() */ return ret; @@ -1503,7 +1540,7 @@ static int __init of_unittest_apply_revert_overlay_check(int overlay_nr, /* apply the overlay */ ovcs_id = 0; - ret = of_unittest_apply_overlay(overlay_nr, unittest_nr, &ovcs_id); + ret = of_unittest_apply_overlay(overlay_nr, &ovcs_id); if (ret != 0) { /* of_unittest_apply_overlay already called unittest() */ return ret; @@ -2161,10 +2198,12 @@ OVERLAY_INFO_EXTERN(overlay_11); OVERLAY_INFO_EXTERN(overlay_12); OVERLAY_INFO_EXTERN(overlay_13); OVERLAY_INFO_EXTERN(overlay_15); +OVERLAY_INFO_EXTERN(overlay_bad_add_dup_node); +OVERLAY_INFO_EXTERN(overlay_bad_add_dup_prop); OVERLAY_INFO_EXTERN(overlay_bad_phandle); OVERLAY_INFO_EXTERN(overlay_bad_symbol); -/* order of entries is hard-coded into users of overlays[] */ +/* entries found by name */ static struct overlay_info overlays[] = { OVERLAY_INFO(overlay_base, -9999), OVERLAY_INFO(overlay, 0), @@ -2183,9 +2222,12 @@ static struct overlay_info overlays[] = { OVERLAY_INFO(overlay_12, 0), OVERLAY_INFO(overlay_13, 0), OVERLAY_INFO(overlay_15, 0), + OVERLAY_INFO(overlay_bad_add_dup_node, -EINVAL), + OVERLAY_INFO(overlay_bad_add_dup_prop, -EINVAL), OVERLAY_INFO(overlay_bad_phandle, -EINVAL), OVERLAY_INFO(overlay_bad_symbol, -EINVAL), - {} + /* end marker */ + {.dtb_begin = NULL, .dtb_end = NULL, .expected_result = 0, .name = NULL} }; static struct device_node *overlay_base_root; @@ -2215,6 +2257,19 @@ void __init unittest_unflatten_overlay_base(void) u32 data_size; void *new_fdt; u32 size; + int found = 0; + const char *overlay_name = "overlay_base"; + + for (info = overlays; info && info->name; info++) { + if (!strcmp(overlay_name, info->name)) { + found = 1; + break; + } + } + if (!found) { + pr_err("no overlay data for %s\n", overlay_name); + return; + } info = &overlays[0]; @@ -2262,11 +2317,10 @@ static int __init overlay_data_apply(const char *overlay_name, int *overlay_id) { struct overlay_info *info; int found = 0; - int k; int ret; u32 size; - for (k = 0, info = overlays; info && info->name; info++, k++) { + for (info = overlays; info && info->name; info++) { if (!strcmp(overlay_name, info->name)) { found = 1; break; @@ -2339,7 +2393,7 @@ static __init void of_unittest_overlay_high_level(void) */ pprev = &overlay_base_root->child; for (np = overlay_base_root->child; np; np = np->sibling) { - if (!of_node_cmp(np->name, "__local_fixups__")) { + if (of_node_name_eq(np, "__local_fixups__")) { *pprev = np->sibling; break; } @@ -2352,7 +2406,7 @@ static __init void of_unittest_overlay_high_level(void) /* will have to graft properties from node into live tree */ pprev = &overlay_base_root->child; for (np = overlay_base_root->child; np; np = np->sibling) { - if (!of_node_cmp(np->name, "__symbols__")) { + if (of_node_name_eq(np, "__symbols__")) { overlay_base_symbols = np; *pprev = np->sibling; break; @@ -2430,6 +2484,12 @@ static __init void of_unittest_overlay_high_level(void) unittest(overlay_data_apply("overlay", NULL), "Adding overlay 'overlay' failed\n"); + unittest(overlay_data_apply("overlay_bad_add_dup_node", NULL), + "Adding overlay 'overlay_bad_add_dup_node' failed\n"); + + unittest(overlay_data_apply("overlay_bad_add_dup_prop", NULL), + "Adding overlay 'overlay_bad_add_dup_prop' failed\n"); + unittest(overlay_data_apply("overlay_bad_phandle", NULL), "Adding overlay 'overlay_bad_phandle' failed\n"); diff --git a/drivers/power/reset/axxia-reset.c b/drivers/power/reset/axxia-reset.c index 4e4cd1c8fe50..b16013265142 100644 --- a/drivers/power/reset/axxia-reset.c +++ b/drivers/power/reset/axxia-reset.c @@ -65,7 +65,7 @@ static int axxia_reset_probe(struct platform_device *pdev) syscon = syscon_regmap_lookup_by_phandle(dev->of_node, "syscon"); if (IS_ERR(syscon)) { - pr_err("%s: syscon lookup failed\n", dev->of_node->name); + pr_err("%pOFn: syscon lookup failed\n", dev->of_node); return PTR_ERR(syscon); } diff --git a/drivers/video/backlight/pm8941-wled.c b/drivers/video/backlight/pm8941-wled.c index 0b6d21955d91..da6aab20fdcb 100644 --- a/drivers/video/backlight/pm8941-wled.c +++ b/drivers/video/backlight/pm8941-wled.c @@ -330,7 +330,7 @@ static int pm8941_wled_configure(struct pm8941_wled *wled, struct device *dev) rc = of_property_read_string(dev->of_node, "label", &wled->name); if (rc) - wled->name = dev->of_node->name; + wled->name = devm_kasprintf(dev, GFP_KERNEL, "%pOFn", dev->of_node); *cfg = pm8941_wled_config_defaults; for (i = 0; i < ARRAY_SIZE(u32_opts); ++i) { diff --git a/include/linux/initrd.h b/include/linux/initrd.h index 84b423044088..14beaff9b445 100644 --- a/include/linux/initrd.h +++ b/include/linux/initrd.h @@ -21,4 +21,7 @@ extern int initrd_below_start_ok; extern unsigned long initrd_start, initrd_end; extern void free_initrd_mem(unsigned long, unsigned long); +extern phys_addr_t phys_initrd_start; +extern unsigned long phys_initrd_size; + extern unsigned int real_root_dev; diff --git a/include/linux/of.h b/include/linux/of.h index 0fe5bef81a7e..fe472e5195a9 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -137,11 +137,16 @@ extern struct device_node *of_aliases; extern struct device_node *of_stdout; extern raw_spinlock_t devtree_lock; -/* flag descriptions (need to be visible even when !CONFIG_OF) */ -#define OF_DYNAMIC 1 /* node and properties were allocated via kmalloc */ -#define OF_DETACHED 2 /* node has been detached from the device tree */ -#define OF_POPULATED 3 /* device already created for the node */ -#define OF_POPULATED_BUS 4 /* of_platform_populate recursed to children of this node */ +/* + * struct device_node flag descriptions + * (need to be visible even when !CONFIG_OF) + */ +#define OF_DYNAMIC 1 /* (and properties) allocated via kmalloc */ +#define OF_DETACHED 2 /* detached from the device tree */ +#define OF_POPULATED 3 /* device already created */ +#define OF_POPULATED_BUS 4 /* platform bus created for children */ +#define OF_OVERLAY 5 /* allocated for an overlay */ +#define OF_OVERLAY_FREE_CSET 6 /* in overlay cset being freed */ #define OF_BAD_ADDR ((u64)-1) @@ -984,6 +989,12 @@ static inline int of_map_rid(struct device_node *np, u32 rid, #define of_node_cmp(s1, s2) strcasecmp((s1), (s2)) #endif +static inline int of_prop_val_eq(struct property *p1, struct property *p2) +{ + return p1->length == p2->length && + !memcmp(p1->value, p2->value, (size_t)p1->length); +} + #if defined(CONFIG_OF) && defined(CONFIG_NUMA) extern int of_node_to_nid(struct device_node *np); #else diff --git a/include/linux/of_pdt.h b/include/linux/of_pdt.h index d0b183ab65c6..89e4eb076a01 100644 --- a/include/linux/of_pdt.h +++ b/include/linux/of_pdt.h @@ -35,6 +35,4 @@ extern void *prom_early_alloc(unsigned long size); /* for building the device tree */ extern void of_pdt_build_devicetree(phandle root_node, struct of_pdt_ops *ops); -extern void (*of_pdt_build_more)(struct device_node *dp); - #endif /* _LINUX_OF_PDT_H */ diff --git a/init/do_mounts_initrd.c b/init/do_mounts_initrd.c index 73e02ea5d5d1..ccfc06607ef2 100644 --- a/init/do_mounts_initrd.c +++ b/init/do_mounts_initrd.c @@ -16,6 +16,9 @@ int initrd_below_start_ok; unsigned int real_root_dev; /* do_proc_dointvec cannot handle kdev_t */ static int __initdata mount_initrd = 1; +phys_addr_t phys_initrd_start __initdata; +unsigned long phys_initrd_size __initdata; + static int __init no_initrd(char *str) { mount_initrd = 0; @@ -24,6 +27,23 @@ static int __init no_initrd(char *str) __setup("noinitrd", no_initrd); +static int __init early_initrd(char *p) +{ + phys_addr_t start; + unsigned long size; + char *endp; + + start = memparse(p, &endp); + if (*endp == ',') { + size = memparse(endp + 1, NULL); + + phys_initrd_start = start; + phys_initrd_size = size; + } + return 0; +} +early_param("initrd", early_initrd); + static int init_linuxrc(struct subprocess_info *info, struct cred *new) { ksys_unshare(CLONE_FS | CLONE_FILES); diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 8fe4468f9bda..0e78249ee77e 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -61,6 +61,11 @@ real-obj-m := $(foreach m, $(obj-m), $(if $(strip $($(m:.o=-objs)) $($(m:.o=-y)) extra-y += $(dtb-y) extra-$(CONFIG_OF_ALL_DTBS) += $(dtb-) +ifneq ($(CHECK_DTBS),) +extra-y += $(patsubst %.dtb,%.dt.yaml, $(dtb-y)) +extra-$(CONFIG_OF_ALL_DTBS) += $(patsubst %.dtb,%.dt.yaml, $(dtb-)) +endif + # Add subdir path extra-y := $(addprefix $(obj)/,$(extra-y)) @@ -251,7 +256,7 @@ DTC_FLAGS += -Wno-unit_address_vs_reg \ -Wno-avoid_unnecessary_addr_size \ -Wno-alias_paths \ -Wno-graph_child_address \ - -Wno-graph_port \ + -Wno-simple_bus_reg \ -Wno-unique_unit_address \ -Wno-pci_device_reg endif @@ -284,13 +289,28 @@ $(obj)/%.dtb.S: $(obj)/%.dtb FORCE quiet_cmd_dtc = DTC $@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \ $(HOSTCC) -E $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \ - $(DTC) -O dtb -o $@ -b 0 \ + $(DTC) -O $(2) -o $@ -b 0 \ $(addprefix -i,$(dir $<) $(DTC_INCLUDE)) $(DTC_FLAGS) \ -d $(depfile).dtc.tmp $(dtc-tmp) ; \ cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile) $(obj)/%.dtb: $(src)/%.dts $(DTC) FORCE - $(call if_changed_dep,dtc) + $(call if_changed_dep,dtc,dtb) + +DT_CHECKER ?= dt-validate +DT_BINDING_DIR := Documentation/devicetree/bindings +DT_TMP_SCHEMA := $(objtree)/$(DT_BINDING_DIR)/processed-schema.yaml + +quiet_cmd_dtb_check = CHECK $@ + cmd_dtb_check = $(DT_CHECKER) -p $(DT_TMP_SCHEMA) $@ ; + +define rule_dtc_dt_yaml + $(call cmd_and_fixdep,dtc,yaml) \ + $(call echo-cmd,dtb_check) $(cmd_dtb_check) +endef + +$(obj)/%.dt.yaml: $(src)/%.dts $(DTC) $(DT_TMP_SCHEMA) FORCE + $(call if_changed_rule,dtc_dt_yaml) dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp) diff --git a/scripts/dtc/Makefile b/scripts/dtc/Makefile index 056d5da6c477..5f227d8d39d8 100644 --- a/scripts/dtc/Makefile +++ b/scripts/dtc/Makefile @@ -12,6 +12,10 @@ dtc-objs += dtc-lexer.lex.o dtc-parser.tab.o HOST_EXTRACFLAGS := -I$(src)/libfdt ifeq ($(wildcard /usr/include/yaml.h),) +ifneq ($(CHECK_DTBS),) +$(error dtc needs libyaml for DT schema validation support. \ + Install the necessary libyaml development package.) +endif HOST_EXTRACFLAGS += -DNO_YAML else dtc-objs += yamltree.o diff --git a/scripts/dtc/checks.c b/scripts/dtc/checks.c index 9c9b0c328af6..4834e44b37b2 100644 --- a/scripts/dtc/checks.c +++ b/scripts/dtc/checks.c @@ -19,6 +19,7 @@ */ #include "dtc.h" +#include "srcpos.h" #ifdef TRACE_CHECKS #define TRACE(c, ...) \ @@ -78,23 +79,56 @@ static inline void PRINTF(5, 6) check_msg(struct check *c, struct dt_info *dti, const char *fmt, ...) { va_list ap; - va_start(ap, fmt); + char *str = NULL; + struct srcpos *pos = NULL; + char *file_str; + + if (!(c->warn && (quiet < 1)) && !(c->error && (quiet < 2))) + return; + + if (prop && prop->srcpos) + pos = prop->srcpos; + else if (node && node->srcpos) + pos = node->srcpos; + + if (pos) { + file_str = srcpos_string(pos); + xasprintf(&str, "%s", file_str); + free(file_str); + } else if (streq(dti->outname, "-")) { + xasprintf(&str, "<stdout>"); + } else { + xasprintf(&str, "%s", dti->outname); + } - if ((c->warn && (quiet < 1)) - || (c->error && (quiet < 2))) { - fprintf(stderr, "%s: %s (%s): ", - strcmp(dti->outname, "-") ? dti->outname : "<stdout>", + xasprintf_append(&str, ": %s (%s): ", (c->error) ? "ERROR" : "Warning", c->name); - if (node) { - fprintf(stderr, "%s", node->fullpath); - if (prop) - fprintf(stderr, ":%s", prop->name); - fputs(": ", stderr); - } - vfprintf(stderr, fmt, ap); - fprintf(stderr, "\n"); + + if (node) { + if (prop) + xasprintf_append(&str, "%s:%s: ", node->fullpath, prop->name); + else + xasprintf_append(&str, "%s: ", node->fullpath); } + + va_start(ap, fmt); + xavsprintf_append(&str, fmt, ap); va_end(ap); + + xasprintf_append(&str, "\n"); + + if (!prop && pos) { + pos = node->srcpos; + while (pos->next) { + pos = pos->next; + + file_str = srcpos_string(pos); + xasprintf_append(&str, " also defined at %s\n", file_str); + free(file_str); + } + } + + fputs(str, stderr); } #define FAIL(c, dti, node, ...) \ @@ -910,7 +944,7 @@ static bool node_is_compatible(struct node *node, const char *compat) for (str = prop->val.val, end = str + prop->val.len; str < end; str += strnlen(str, end - str) + 1) { - if (strprefixeq(str, end - str, compat)) + if (streq(str, compat)) return true; } return false; @@ -921,7 +955,8 @@ static void check_simple_bus_bridge(struct check *c, struct dt_info *dti, struct if (node_is_compatible(node, "simple-bus")) node->bus = &simple_bus; } -WARNING(simple_bus_bridge, check_simple_bus_bridge, NULL, &addr_size_cells); +WARNING(simple_bus_bridge, check_simple_bus_bridge, NULL, + &addr_size_cells, &compatible_is_string_list); static void check_simple_bus_reg(struct check *c, struct dt_info *dti, struct node *node) { @@ -1035,6 +1070,7 @@ static const struct bus_type spi_bus = { static void check_spi_bus_bridge(struct check *c, struct dt_info *dti, struct node *node) { + int spi_addr_cells = 1; if (strprefixeq(node->name, node->basenamelen, "spi")) { node->bus = &spi_bus; @@ -1063,7 +1099,9 @@ static void check_spi_bus_bridge(struct check *c, struct dt_info *dti, struct no if (node->bus != &spi_bus || !node->children) return; - if (node_addr_cells(node) != 1) + if (get_property(node, "spi-slave")) + spi_addr_cells = 0; + if (node_addr_cells(node) != spi_addr_cells) FAIL(c, dti, node, "incorrect #address-cells for SPI bus"); if (node_size_cells(node) != 0) FAIL(c, dti, node, "incorrect #size-cells for SPI bus"); @@ -1082,6 +1120,9 @@ static void check_spi_bus_reg(struct check *c, struct dt_info *dti, struct node if (!node->parent || (node->parent->bus != &spi_bus)) return; + if (get_property(node->parent, "spi-slave")) + return; + prop = get_property(node, "reg"); if (prop) cells = (cell_t *)prop->val.val; diff --git a/scripts/dtc/dtc-lexer.l b/scripts/dtc/dtc-lexer.l index 615b7ec6588f..06c040902444 100644 --- a/scripts/dtc/dtc-lexer.l +++ b/scripts/dtc/dtc-lexer.l @@ -213,14 +213,14 @@ static void PRINTF(1, 2) lexical_error(const char *fmt, ...); <*>\&{LABEL} { /* label reference */ DPRINT("Ref: %s\n", yytext+1); yylval.labelref = xstrdup(yytext+1); - return DT_REF; + return DT_LABEL_REF; } <*>"&{/"{PATHCHAR}*\} { /* new-style path reference */ yytext[yyleng-1] = '\0'; DPRINT("Ref: %s\n", yytext+2); yylval.labelref = xstrdup(yytext+2); - return DT_REF; + return DT_PATH_REF; } <BYTESTRING>[0-9a-fA-F]{2} { diff --git a/scripts/dtc/dtc-parser.y b/scripts/dtc/dtc-parser.y index dd70ebf386f4..2ec981e86111 100644 --- a/scripts/dtc/dtc-parser.y +++ b/scripts/dtc/dtc-parser.y @@ -70,7 +70,8 @@ extern bool treesource_error; %token <byte> DT_BYTE %token <data> DT_STRING %token <labelref> DT_LABEL -%token <labelref> DT_REF +%token <labelref> DT_LABEL_REF +%token <labelref> DT_PATH_REF %token DT_INCBIN %type <data> propdata @@ -83,6 +84,7 @@ extern bool treesource_error; %type <data> bytestring %type <prop> propdef %type <proplist> proplist +%type <labelref> dt_ref %type <node> devicetree %type <node> nodedef @@ -158,6 +160,8 @@ memreserve: } ; +dt_ref: DT_LABEL_REF | DT_PATH_REF; + devicetree: '/' nodedef { @@ -167,7 +171,7 @@ devicetree: { $$ = merge_nodes($1, $3); } - | DT_REF nodedef + | dt_ref nodedef { /* * We rely on the rule being always: @@ -176,9 +180,12 @@ devicetree: */ if (!($<flags>-1 & DTSF_PLUGIN)) ERROR(&@2, "Label or path %s not found", $1); - $$ = add_orphan_node(name_node(build_node(NULL, NULL), ""), $2, $1); + $$ = add_orphan_node( + name_node(build_node(NULL, NULL, NULL), + ""), + $2, $1); } - | devicetree DT_LABEL DT_REF nodedef + | devicetree DT_LABEL dt_ref nodedef { struct node *target = get_node_by_ref($1, $3); @@ -189,7 +196,7 @@ devicetree: ERROR(&@3, "Label or path %s not found", $3); $$ = $1; } - | devicetree DT_REF nodedef + | devicetree DT_PATH_REF nodedef { /* * We rely on the rule being always: @@ -208,7 +215,26 @@ devicetree: } $$ = $1; } - | devicetree DT_DEL_NODE DT_REF ';' + | devicetree DT_LABEL_REF nodedef + { + struct node *target = get_node_by_ref($1, $2); + + if (target) { + merge_nodes(target, $3); + } else { + /* + * We rely on the rule being always: + * versioninfo plugindecl memreserves devicetree + * so $-1 is what we want (plugindecl) + */ + if ($<flags>-1 & DTSF_PLUGIN) + add_orphan_node($1, $3, $2); + else + ERROR(&@2, "Label or path %s not found", $2); + } + $$ = $1; + } + | devicetree DT_DEL_NODE dt_ref ';' { struct node *target = get_node_by_ref($1, $3); @@ -220,7 +246,7 @@ devicetree: $$ = $1; } - | devicetree DT_OMIT_NO_REF DT_REF ';' + | devicetree DT_OMIT_NO_REF dt_ref ';' { struct node *target = get_node_by_ref($1, $3); @@ -237,7 +263,7 @@ devicetree: nodedef: '{' proplist subnodes '}' ';' { - $$ = build_node($2, $3); + $$ = build_node($2, $3, &@$); } ; @@ -255,11 +281,11 @@ proplist: propdef: DT_PROPNODENAME '=' propdata ';' { - $$ = build_property($1, $3); + $$ = build_property($1, $3, &@$); } | DT_PROPNODENAME ';' { - $$ = build_property($1, empty_data); + $$ = build_property($1, empty_data, &@$); } | DT_DEL_PROP DT_PROPNODENAME ';' { @@ -285,7 +311,7 @@ propdata: { $$ = data_merge($1, $3); } - | propdataprefix DT_REF + | propdataprefix dt_ref { $1 = data_add_marker($1, TYPE_STRING, $2); $$ = data_add_marker($1, REF_PATH, $2); @@ -383,7 +409,7 @@ arrayprefix: $$.data = data_append_integer($1.data, $2, $1.bits); } - | arrayprefix DT_REF + | arrayprefix dt_ref { uint64_t val = ~0ULL >> (64 - $1.bits); @@ -540,7 +566,7 @@ subnode: } | DT_DEL_NODE DT_PROPNODENAME ';' { - $$ = name_node(build_node_delete(), $2); + $$ = name_node(build_node_delete(&@$), $2); } | DT_OMIT_NO_REF subnode { diff --git a/scripts/dtc/dtc.c b/scripts/dtc/dtc.c index 64134aadb997..695e1f789fc7 100644 --- a/scripts/dtc/dtc.c +++ b/scripts/dtc/dtc.c @@ -35,6 +35,8 @@ int phandle_format = PHANDLE_EPAPR; /* Use linux,phandle or phandle properties * int generate_symbols; /* enable symbols & fixup support */ int generate_fixups; /* suppress generation of fixups on symbol support */ int auto_label_aliases; /* auto generate labels -> aliases */ +int annotate; /* Level of annotation: 1 for input source location + >1 for full input source location. */ static int is_power_of_2(int x) { @@ -60,7 +62,7 @@ static void fill_fullpaths(struct node *tree, const char *prefix) /* Usage related data. */ static const char usage_synopsis[] = "dtc [options] <input file>"; -static const char usage_short_opts[] = "qI:O:o:V:d:R:S:p:a:fb:i:H:sW:E:@Ahv"; +static const char usage_short_opts[] = "qI:O:o:V:d:R:S:p:a:fb:i:H:sW:E:@AThv"; static struct option const usage_long_opts[] = { {"quiet", no_argument, NULL, 'q'}, {"in-format", a_argument, NULL, 'I'}, @@ -81,6 +83,7 @@ static struct option const usage_long_opts[] = { {"error", a_argument, NULL, 'E'}, {"symbols", no_argument, NULL, '@'}, {"auto-alias", no_argument, NULL, 'A'}, + {"annotate", no_argument, NULL, 'T'}, {"help", no_argument, NULL, 'h'}, {"version", no_argument, NULL, 'v'}, {NULL, no_argument, NULL, 0x0}, @@ -117,6 +120,7 @@ static const char * const usage_opts_help[] = { "\n\tEnable/disable errors (prefix with \"no-\")", "\n\tEnable generation of symbols", "\n\tEnable auto-alias of labels", + "\n\tAnnotate output .dts with input source file and line (-T -T for more details)", "\n\tPrint this help and exit", "\n\tPrint version and exit", NULL, @@ -264,6 +268,9 @@ int main(int argc, char *argv[]) case 'A': auto_label_aliases = 1; break; + case 'T': + annotate++; + break; case 'h': usage(NULL); @@ -302,6 +309,8 @@ int main(int argc, char *argv[]) outform = "dts"; } } + if (annotate && (!streq(inform, "dts") || !streq(outform, "dts"))) + die("--annotate requires -I dts -O dts\n"); if (streq(inform, "dts")) dti = dt_from_source(arg); else if (streq(inform, "fs")) diff --git a/scripts/dtc/dtc.h b/scripts/dtc/dtc.h index cbe541525c2c..789e0b1bc057 100644 --- a/scripts/dtc/dtc.h +++ b/scripts/dtc/dtc.h @@ -58,6 +58,7 @@ extern int phandle_format; /* Use linux,phandle or phandle properties */ extern int generate_symbols; /* generate symbols for nodes with labels */ extern int generate_fixups; /* generate fixups */ extern int auto_label_aliases; /* auto generate labels -> aliases */ +extern int annotate; /* annotate .dts with input source location */ #define PHANDLE_LEGACY 0x1 #define PHANDLE_EPAPR 0x2 @@ -158,6 +159,7 @@ struct property { struct property *next; struct label *labels; + struct srcpos *srcpos; }; struct node { @@ -177,6 +179,7 @@ struct node { struct label *labels; const struct bus_type *bus; + struct srcpos *srcpos; bool omit_if_unused, is_referenced; }; @@ -205,13 +208,15 @@ struct node { void add_label(struct label **labels, char *label); void delete_labels(struct label **labels); -struct property *build_property(char *name, struct data val); +struct property *build_property(char *name, struct data val, + struct srcpos *srcpos); struct property *build_property_delete(char *name); struct property *chain_property(struct property *first, struct property *list); struct property *reverse_properties(struct property *first); -struct node *build_node(struct property *proplist, struct node *children); -struct node *build_node_delete(void); +struct node *build_node(struct property *proplist, struct node *children, + struct srcpos *srcpos); +struct node *build_node_delete(struct srcpos *srcpos); struct node *name_node(struct node *node, char *name); struct node *omit_node_if_unused(struct node *node); struct node *reference_node(struct node *node); diff --git a/scripts/dtc/flattree.c b/scripts/dtc/flattree.c index 851ea87dbc0f..acf04c30669f 100644 --- a/scripts/dtc/flattree.c +++ b/scripts/dtc/flattree.c @@ -692,7 +692,7 @@ static struct property *flat_read_property(struct inbuf *dtbuf, val = flat_read_data(dtbuf, proplen); - return build_property(name, val); + return build_property(name, val, NULL); } @@ -750,7 +750,7 @@ static struct node *unflatten_tree(struct inbuf *dtbuf, char *flatname; uint32_t val; - node = build_node(NULL, NULL); + node = build_node(NULL, NULL, NULL); flatname = flat_read_string(dtbuf); diff --git a/scripts/dtc/fstree.c b/scripts/dtc/fstree.c index ae7d06c3c492..1e7eeba47ff6 100644 --- a/scripts/dtc/fstree.c +++ b/scripts/dtc/fstree.c @@ -34,7 +34,7 @@ static struct node *read_fstree(const char *dirname) if (!d) die("Couldn't opendir() \"%s\": %s\n", dirname, strerror(errno)); - tree = build_node(NULL, NULL); + tree = build_node(NULL, NULL, NULL); while ((de = readdir(d)) != NULL) { char *tmpname; @@ -60,7 +60,8 @@ static struct node *read_fstree(const char *dirname) } else { prop = build_property(xstrdup(de->d_name), data_copy_file(pfile, - st.st_size)); + st.st_size), + NULL); add_property(tree, prop); fclose(pfile); } diff --git a/scripts/dtc/libfdt/Makefile.libfdt b/scripts/dtc/libfdt/Makefile.libfdt index 098b3f36e668..3af3656df801 100644 --- a/scripts/dtc/libfdt/Makefile.libfdt +++ b/scripts/dtc/libfdt/Makefile.libfdt @@ -9,3 +9,7 @@ LIBFDT_VERSION = version.lds LIBFDT_SRCS = fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c fdt_empty_tree.c \ fdt_addresses.c fdt_overlay.c LIBFDT_OBJS = $(LIBFDT_SRCS:%.c=%.o) + +libfdt_clean: + @$(VECHO) CLEAN "(libfdt)" + rm -f $(STD_CLEANFILES:%=$(LIBFDT_dir)/%) diff --git a/scripts/dtc/libfdt/fdt_addresses.c b/scripts/dtc/libfdt/fdt_addresses.c index 49537b578d03..f13a87dfa068 100644 --- a/scripts/dtc/libfdt/fdt_addresses.c +++ b/scripts/dtc/libfdt/fdt_addresses.c @@ -64,7 +64,7 @@ static int fdt_cells(const void *fdt, int nodeoffset, const char *name) c = fdt_getprop(fdt, nodeoffset, name, &len); if (!c) - return 2; + return len; if (len != sizeof(*c)) return -FDT_ERR_BADNCELLS; @@ -78,10 +78,20 @@ static int fdt_cells(const void *fdt, int nodeoffset, const char *name) int fdt_address_cells(const void *fdt, int nodeoffset) { - return fdt_cells(fdt, nodeoffset, "#address-cells"); + int val; + + val = fdt_cells(fdt, nodeoffset, "#address-cells"); + if (val == -FDT_ERR_NOTFOUND) + return 2; + return val; } int fdt_size_cells(const void *fdt, int nodeoffset) { - return fdt_cells(fdt, nodeoffset, "#size-cells"); + int val; + + val = fdt_cells(fdt, nodeoffset, "#size-cells"); + if (val == -FDT_ERR_NOTFOUND) + return 1; + return val; } diff --git a/scripts/dtc/libfdt/libfdt.h b/scripts/dtc/libfdt/libfdt.h index 2bd151dd355f..627da2e079c9 100644 --- a/scripts/dtc/libfdt/libfdt.h +++ b/scripts/dtc/libfdt/libfdt.h @@ -163,18 +163,26 @@ uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset); static inline uint32_t fdt32_ld(const fdt32_t *p) { - fdt32_t v; + const uint8_t *bp = (const uint8_t *)p; - memcpy(&v, p, sizeof(v)); - return fdt32_to_cpu(v); + return ((uint32_t)bp[0] << 24) + | ((uint32_t)bp[1] << 16) + | ((uint32_t)bp[2] << 8) + | bp[3]; } static inline uint64_t fdt64_ld(const fdt64_t *p) { - fdt64_t v; - - memcpy(&v, p, sizeof(v)); - return fdt64_to_cpu(v); + const uint8_t *bp = (const uint8_t *)p; + + return ((uint64_t)bp[0] << 56) + | ((uint64_t)bp[1] << 48) + | ((uint64_t)bp[2] << 40) + | ((uint64_t)bp[3] << 32) + | ((uint64_t)bp[4] << 24) + | ((uint64_t)bp[5] << 16) + | ((uint64_t)bp[6] << 8) + | bp[7]; } /**********************************************************************/ @@ -1145,7 +1153,7 @@ int fdt_address_cells(const void *fdt, int nodeoffset); * * returns: * 0 <= n < FDT_MAX_NCELLS, on success - * 2, if the node has no #size-cells property + * 1, if the node has no #size-cells property * -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid * #size-cells property * -FDT_ERR_BADMAGIC, diff --git a/scripts/dtc/livetree.c b/scripts/dtc/livetree.c index 4ff0679e0062..7a2e6446a17b 100644 --- a/scripts/dtc/livetree.c +++ b/scripts/dtc/livetree.c @@ -19,6 +19,7 @@ */ #include "dtc.h" +#include "srcpos.h" /* * Tree building functions @@ -50,7 +51,8 @@ void delete_labels(struct label **labels) label->deleted = 1; } -struct property *build_property(char *name, struct data val) +struct property *build_property(char *name, struct data val, + struct srcpos *srcpos) { struct property *new = xmalloc(sizeof(*new)); @@ -58,6 +60,7 @@ struct property *build_property(char *name, struct data val) new->name = name; new->val = val; + new->srcpos = srcpos_copy(srcpos); return new; } @@ -97,7 +100,8 @@ struct property *reverse_properties(struct property *first) return head; } -struct node *build_node(struct property *proplist, struct node *children) +struct node *build_node(struct property *proplist, struct node *children, + struct srcpos *srcpos) { struct node *new = xmalloc(sizeof(*new)); struct node *child; @@ -106,6 +110,7 @@ struct node *build_node(struct property *proplist, struct node *children) new->proplist = reverse_properties(proplist); new->children = children; + new->srcpos = srcpos_copy(srcpos); for_each_child(new, child) { child->parent = new; @@ -114,13 +119,14 @@ struct node *build_node(struct property *proplist, struct node *children) return new; } -struct node *build_node_delete(void) +struct node *build_node_delete(struct srcpos *srcpos) { struct node *new = xmalloc(sizeof(*new)); memset(new, 0, sizeof(*new)); new->deleted = 1; + new->srcpos = srcpos_copy(srcpos); return new; } @@ -183,6 +189,8 @@ struct node *merge_nodes(struct node *old_node, struct node *new_node) old_prop->val = new_prop->val; old_prop->deleted = 0; + free(old_prop->srcpos); + old_prop->srcpos = new_prop->srcpos; free(new_prop); new_prop = NULL; break; @@ -223,6 +231,8 @@ struct node *merge_nodes(struct node *old_node, struct node *new_node) add_child(old_node, new_child); } + old_node->srcpos = srcpos_extend(old_node->srcpos, new_node->srcpos); + /* The new node contents are now merged into the old node. Free * the new node. */ free(new_node); @@ -241,18 +251,18 @@ struct node * add_orphan_node(struct node *dt, struct node *new_node, char *ref) if (ref[0] == '/') { d = data_append_data(d, ref, strlen(ref) + 1); - p = build_property("target-path", d); + p = build_property("target-path", d, NULL); } else { d = data_add_marker(d, REF_PHANDLE, ref); d = data_append_integer(d, 0xffffffff, 32); - p = build_property("target", d); + p = build_property("target", d, NULL); } xasprintf(&name, "fragment@%u", next_orphan_fragment++); name_node(new_node, "__overlay__"); - node = build_node(p, new_node); + node = build_node(p, new_node, NULL); name_node(node, name); add_child(dt, node); @@ -351,7 +361,7 @@ void append_to_property(struct node *node, p->val = d; } else { d = data_append_data(empty_data, data, len); - p = build_property(name, d); + p = build_property(name, d, NULL); add_property(node, p); } } @@ -609,11 +619,11 @@ cell_t get_node_phandle(struct node *root, struct node *node) if (!get_property(node, "linux,phandle") && (phandle_format & PHANDLE_LEGACY)) - add_property(node, build_property("linux,phandle", d)); + add_property(node, build_property("linux,phandle", d, NULL)); if (!get_property(node, "phandle") && (phandle_format & PHANDLE_EPAPR)) - add_property(node, build_property("phandle", d)); + add_property(node, build_property("phandle", d, NULL)); /* If the node *does* have a phandle property, we must * be dealing with a self-referencing phandle, which will be @@ -787,7 +797,7 @@ static struct node *build_and_name_child_node(struct node *parent, char *name) { struct node *node; - node = build_node(NULL, NULL); + node = build_node(NULL, NULL, NULL); name_node(node, xstrdup(name)); add_child(parent, node); @@ -849,7 +859,8 @@ static void generate_label_tree_internal(struct dt_info *dti, /* insert it */ p = build_property(l->label, data_copy_mem(node->fullpath, - strlen(node->fullpath) + 1)); + strlen(node->fullpath) + 1), + NULL); add_property(an, p); } diff --git a/scripts/dtc/srcpos.c b/scripts/dtc/srcpos.c index cb6ed0e3e5e4..41f83700ee91 100644 --- a/scripts/dtc/srcpos.c +++ b/scripts/dtc/srcpos.c @@ -33,6 +33,9 @@ struct search_path { /* This is the list of directories that we search for source files */ static struct search_path *search_path_head, **search_path_tail; +/* Detect infinite include recursion. */ +#define MAX_SRCFILE_DEPTH (100) +static int srcfile_depth; /* = 0 */ static char *get_dirname(const char *path) { @@ -51,11 +54,51 @@ static char *get_dirname(const char *path) FILE *depfile; /* = NULL */ struct srcfile_state *current_srcfile; /* = NULL */ +static char *initial_path; /* = NULL */ +static int initial_pathlen; /* = 0 */ +static bool initial_cpp = true; -/* Detect infinite include recursion. */ -#define MAX_SRCFILE_DEPTH (100) -static int srcfile_depth; /* = 0 */ +static void set_initial_path(char *fname) +{ + int i, len = strlen(fname); + xasprintf(&initial_path, "%s", fname); + initial_pathlen = 0; + for (i = 0; i != len; i++) + if (initial_path[i] == '/') + initial_pathlen++; +} + +static char *shorten_to_initial_path(char *fname) +{ + char *p1, *p2, *prevslash1 = NULL; + int slashes = 0; + + for (p1 = fname, p2 = initial_path; *p1 && *p2; p1++, p2++) { + if (*p1 != *p2) + break; + if (*p1 == '/') { + prevslash1 = p1; + slashes++; + } + } + p1 = prevslash1 + 1; + if (prevslash1) { + int diff = initial_pathlen - slashes, i, j; + int restlen = strlen(fname) - (p1 - fname); + char *res; + + res = xmalloc((3 * diff) + restlen + 1); + for (i = 0, j = 0; i != diff; i++) { + res[j++] = '.'; + res[j++] = '.'; + res[j++] = '/'; + } + strcpy(res + j, p1); + return res; + } + return NULL; +} /** * Try to open a file in a given directory. @@ -157,6 +200,9 @@ void srcfile_push(const char *fname) srcfile->colno = 1; current_srcfile = srcfile; + + if (srcfile_depth == 1) + set_initial_path(srcfile->name); } bool srcfile_pop(void) @@ -197,18 +243,6 @@ void srcfile_add_search_path(const char *dirname) search_path_tail = &node->next; } -/* - * The empty source position. - */ - -struct srcpos srcpos_empty = { - .first_line = 0, - .first_column = 0, - .last_line = 0, - .last_column = 0, - .file = NULL, -}; - void srcpos_update(struct srcpos *pos, const char *text, int len) { int i; @@ -234,13 +268,35 @@ struct srcpos * srcpos_copy(struct srcpos *pos) { struct srcpos *pos_new; + struct srcfile_state *srcfile_state; + + if (!pos) + return NULL; pos_new = xmalloc(sizeof(struct srcpos)); + assert(pos->next == NULL); memcpy(pos_new, pos, sizeof(struct srcpos)); + /* allocate without free */ + srcfile_state = xmalloc(sizeof(struct srcfile_state)); + memcpy(srcfile_state, pos->file, sizeof(struct srcfile_state)); + pos_new->file = srcfile_state; + return pos_new; } +struct srcpos *srcpos_extend(struct srcpos *pos, struct srcpos *newtail) +{ + struct srcpos *p; + + if (!pos) + return newtail; + + for (p = pos; p->next != NULL; p = p->next); + p->next = newtail; + return pos; +} + char * srcpos_string(struct srcpos *pos) { @@ -266,6 +322,68 @@ srcpos_string(struct srcpos *pos) return pos_str; } +static char * +srcpos_string_comment(struct srcpos *pos, bool first_line, int level) +{ + char *pos_str, *fname, *first, *rest; + bool fresh_fname = false; + + if (!pos) { + if (level > 1) { + xasprintf(&pos_str, "<no-file>:<no-line>"); + return pos_str; + } else { + return NULL; + } + } + + if (!pos->file) + fname = "<no-file>"; + else if (!pos->file->name) + fname = "<no-filename>"; + else if (level > 1) + fname = pos->file->name; + else { + fname = shorten_to_initial_path(pos->file->name); + if (fname) + fresh_fname = true; + else + fname = pos->file->name; + } + + if (level > 1) + xasprintf(&first, "%s:%d:%d-%d:%d", fname, + pos->first_line, pos->first_column, + pos->last_line, pos->last_column); + else + xasprintf(&first, "%s:%d", fname, + first_line ? pos->first_line : pos->last_line); + + if (fresh_fname) + free(fname); + + if (pos->next != NULL) { + rest = srcpos_string_comment(pos->next, first_line, level); + xasprintf(&pos_str, "%s, %s", first, rest); + free(first); + free(rest); + } else { + pos_str = first; + } + + return pos_str; +} + +char *srcpos_string_first(struct srcpos *pos, int level) +{ + return srcpos_string_comment(pos, true, level); +} + +char *srcpos_string_last(struct srcpos *pos, int level) +{ + return srcpos_string_comment(pos, false, level); +} + void srcpos_verror(struct srcpos *pos, const char *prefix, const char *fmt, va_list va) { @@ -294,4 +412,9 @@ void srcpos_set_line(char *f, int l) { current_srcfile->name = f; current_srcfile->lineno = l; + + if (initial_cpp) { + initial_cpp = false; + set_initial_path(f); + } } diff --git a/scripts/dtc/srcpos.h b/scripts/dtc/srcpos.h index 9ded12a3830a..6326a952c40e 100644 --- a/scripts/dtc/srcpos.h +++ b/scripts/dtc/srcpos.h @@ -74,6 +74,7 @@ struct srcpos { int last_line; int last_column; struct srcfile_state *file; + struct srcpos *next; }; #define YYLTYPE struct srcpos @@ -93,19 +94,18 @@ struct srcpos { YYRHSLOC(Rhs, 0).last_column; \ (Current).file = YYRHSLOC (Rhs, 0).file; \ } \ + (Current).next = NULL; \ } while (0) -/* - * Fictional source position used for IR nodes that are - * created without otherwise knowing a true source position. - * For example,constant definitions from the command line. - */ -extern struct srcpos srcpos_empty; - extern void srcpos_update(struct srcpos *pos, const char *text, int len); extern struct srcpos *srcpos_copy(struct srcpos *pos); +extern struct srcpos *srcpos_extend(struct srcpos *new_srcpos, + struct srcpos *old_srcpos); extern char *srcpos_string(struct srcpos *pos); +extern char *srcpos_string_first(struct srcpos *pos, int level); +extern char *srcpos_string_last(struct srcpos *pos, int level); + extern void PRINTF(3, 0) srcpos_verror(struct srcpos *pos, const char *prefix, const char *fmt, va_list va); diff --git a/scripts/dtc/treesource.c b/scripts/dtc/treesource.c index f2874f1d1465..1af36628b75f 100644 --- a/scripts/dtc/treesource.c +++ b/scripts/dtc/treesource.c @@ -64,6 +64,10 @@ static bool isstring(char c) static void write_propval_string(FILE *f, const char *s, size_t len) { const char *end = s + len - 1; + + if (!len) + return; + assert(*end == '\0'); fprintf(f, "\""); @@ -118,18 +122,20 @@ static void write_propval_int(FILE *f, const char *p, size_t len, size_t width) for (; p < end; p += width) { switch (width) { case 1: - fprintf(f, " %02"PRIx8, *(const uint8_t*)p); + fprintf(f, "%02"PRIx8, *(const uint8_t*)p); break; case 2: - fprintf(f, " 0x%02"PRIx16, fdt16_to_cpu(*(const fdt16_t*)p)); + fprintf(f, "0x%02"PRIx16, fdt16_to_cpu(*(const fdt16_t*)p)); break; case 4: - fprintf(f, " 0x%02"PRIx32, fdt32_to_cpu(*(const fdt32_t*)p)); + fprintf(f, "0x%02"PRIx32, fdt32_to_cpu(*(const fdt32_t*)p)); break; case 8: - fprintf(f, " 0x%02"PRIx64, fdt64_to_cpu(*(const fdt64_t*)p)); + fprintf(f, "0x%02"PRIx64, fdt64_to_cpu(*(const fdt64_t*)p)); break; } + if (p + width < end) + fputc(' ', f); } } @@ -162,10 +168,10 @@ static const char *delim_start[] = { [TYPE_STRING] = "", }; static const char *delim_end[] = { - [TYPE_UINT8] = " ]", - [TYPE_UINT16] = " >", - [TYPE_UINT32] = " >", - [TYPE_UINT64] = " >", + [TYPE_UINT8] = "]", + [TYPE_UINT16] = ">", + [TYPE_UINT32] = ">", + [TYPE_UINT64] = ">", [TYPE_STRING] = "", }; @@ -208,13 +214,22 @@ static void write_propval(FILE *f, struct property *prop) struct marker *m = prop->val.markers; struct marker dummy_marker; enum markertype emit_type = TYPE_NONE; + char *srcstr; if (len == 0) { - fprintf(f, ";\n"); + fprintf(f, ";"); + if (annotate) { + srcstr = srcpos_string_first(prop->srcpos, annotate); + if (srcstr) { + fprintf(f, " /* %s */", srcstr); + free(srcstr); + } + } + fprintf(f, "\n"); return; } - fprintf(f, " = "); + fprintf(f, " ="); if (!next_type_marker(m)) { /* data type information missing, need to guess */ @@ -225,32 +240,23 @@ static void write_propval(FILE *f, struct property *prop) m = &dummy_marker; } - struct marker *m_label = prop->val.markers; for_each_marker(m) { - size_t chunk_len; + size_t chunk_len = (m->next ? m->next->offset : len) - m->offset; + size_t data_len = type_marker_length(m) ? : len - m->offset; const char *p = &prop->val.val[m->offset]; - if (!has_data_type_information(m)) - continue; - - chunk_len = type_marker_length(m); - if (!chunk_len) - chunk_len = len - m->offset; - - if (emit_type != TYPE_NONE) - fprintf(f, "%s, ", delim_end[emit_type]); - emit_type = m->type; - - for_each_marker_of_type(m_label, LABEL) { - if (m_label->offset > m->offset) - break; - fprintf(f, "%s: ", m_label->ref); - } - - fprintf(f, "%s", delim_start[emit_type]); + if (has_data_type_information(m)) { + emit_type = m->type; + fprintf(f, " %s", delim_start[emit_type]); + } else if (m->type == LABEL) + fprintf(f, " %s:", m->ref); + else if (m->offset) + fputc(' ', f); - if (chunk_len <= 0) + if (emit_type == TYPE_NONE) { + assert(chunk_len == 0); continue; + } switch(emit_type) { case TYPE_UINT16: @@ -268,15 +274,23 @@ static void write_propval(FILE *f, struct property *prop) default: write_propval_int(f, p, chunk_len, 1); } - } - /* Wrap up any labels at the end of the value */ - for_each_marker_of_type(m_label, LABEL) { - assert (m_label->offset == len); - fprintf(f, " %s:", m_label->ref); + if (chunk_len == data_len) { + size_t pos = m->offset + chunk_len; + fprintf(f, pos == len ? "%s" : "%s,", + delim_end[emit_type] ? : ""); + emit_type = TYPE_NONE; + } } - - fprintf(f, "%s;\n", delim_end[emit_type] ? : ""); + fprintf(f, ";"); + if (annotate) { + srcstr = srcpos_string_first(prop->srcpos, annotate); + if (srcstr) { + fprintf(f, " /* %s */", srcstr); + free(srcstr); + } + } + fprintf(f, "\n"); } static void write_tree_source_node(FILE *f, struct node *tree, int level) @@ -284,14 +298,24 @@ static void write_tree_source_node(FILE *f, struct node *tree, int level) struct property *prop; struct node *child; struct label *l; + char *srcstr; write_prefix(f, level); for_each_label(tree->labels, l) fprintf(f, "%s: ", l->label); if (tree->name && (*tree->name)) - fprintf(f, "%s {\n", tree->name); + fprintf(f, "%s {", tree->name); else - fprintf(f, "/ {\n"); + fprintf(f, "/ {"); + + if (annotate) { + srcstr = srcpos_string_first(tree->srcpos, annotate); + if (srcstr) { + fprintf(f, " /* %s */", srcstr); + free(srcstr); + } + } + fprintf(f, "\n"); for_each_property(tree, prop) { write_prefix(f, level+1); @@ -305,10 +329,17 @@ static void write_tree_source_node(FILE *f, struct node *tree, int level) write_tree_source_node(f, child, level+1); } write_prefix(f, level); - fprintf(f, "};\n"); + fprintf(f, "};"); + if (annotate) { + srcstr = srcpos_string_last(tree->srcpos, annotate); + if (srcstr) { + fprintf(f, " /* %s */", srcstr); + free(srcstr); + } + } + fprintf(f, "\n"); } - void dt_to_source(FILE *f, struct dt_info *dti) { struct reserve_info *re; diff --git a/scripts/dtc/util.c b/scripts/dtc/util.c index a69b7a13463d..9c6fb5f286ae 100644 --- a/scripts/dtc/util.c +++ b/scripts/dtc/util.c @@ -46,36 +46,54 @@ char *xstrdup(const char *s) return d; } -/* based in part from (3) vsnprintf */ -int xasprintf(char **strp, const char *fmt, ...) +int xavsprintf_append(char **strp, const char *fmt, va_list ap) { - int n, size = 128; /* start with 128 bytes */ + int n, size = 0; /* start with 128 bytes */ char *p; - va_list ap; + va_list ap_copy; - /* initial pointer is NULL making the fist realloc to be malloc */ - p = NULL; - while (1) { - p = xrealloc(p, size); + p = *strp; + if (p) + size = strlen(p); - /* Try to print in the allocated space. */ - va_start(ap, fmt); - n = vsnprintf(p, size, fmt, ap); - va_end(ap); + va_copy(ap_copy, ap); + n = vsnprintf(NULL, 0, fmt, ap_copy) + 1; + va_end(ap_copy); + + p = xrealloc(p, size + n); + + n = vsnprintf(p + size, n, fmt, ap); - /* If that worked, return the string. */ - if (n > -1 && n < size) - break; - /* Else try again with more space. */ - if (n > -1) /* glibc 2.1 */ - size = n + 1; /* precisely what is needed */ - else /* glibc 2.0 */ - size *= 2; /* twice the old size */ - } *strp = p; return strlen(p); } +int xasprintf_append(char **strp, const char *fmt, ...) +{ + int n; + va_list ap; + + va_start(ap, fmt); + n = xavsprintf_append(strp, fmt, ap); + va_end(ap); + + return n; +} + +int xasprintf(char **strp, const char *fmt, ...) +{ + int n; + va_list ap; + + *strp = NULL; + + va_start(ap, fmt); + n = xavsprintf_append(strp, fmt, ap); + va_end(ap); + + return n; +} + char *join_path(const char *path, const char *name) { int lenp = strlen(path); diff --git a/scripts/dtc/util.h b/scripts/dtc/util.h index f6cea8274174..7658781a6200 100644 --- a/scripts/dtc/util.h +++ b/scripts/dtc/util.h @@ -72,6 +72,8 @@ static inline void *xrealloc(void *p, size_t len) extern char *xstrdup(const char *s); extern int PRINTF(2, 3) xasprintf(char **strp, const char *fmt, ...); +extern int PRINTF(2, 3) xasprintf_append(char **strp, const char *fmt, ...); +extern int xavsprintf_append(char **strp, const char *fmt, va_list ap); extern char *join_path(const char *path, const char *name); /** diff --git a/scripts/dtc/version_gen.h b/scripts/dtc/version_gen.h index 6d23fd095f16..75f383c0b9d3 100644 --- a/scripts/dtc/version_gen.h +++ b/scripts/dtc/version_gen.h @@ -1 +1 @@ -#define DTC_VERSION "DTC 1.4.7-gc86da84d" +#define DTC_VERSION "DTC 1.4.7-gf267e674" |