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| author | Lee Jones <lee.jones@linaro.org> | 2012-03-07 17:22:30 +0000 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-03-16 19:48:31 +0000 |
| commit | dab6487e35680ac5043c58a60554c49052276f5e (patch) | |
| tree | cd1a3e1985e7545ad9c5eb423a0090f8310370c2 | |
| parent | 7e0ce270b2ef3d0d00c3f0725f48aa3127d73edf (diff) | |
| download | linux-dab6487e35680ac5043c58a60554c49052276f5e.tar.bz2 | |
ARM: ux500: Enable Cortex-A9 GIC (Generic Interrupt Controller) in Device Tree
This enables the embedded GIC on all u8500 based hardware using DT.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| -rw-r--r-- | arch/arm/boot/dts/db8500.dtsi | 11 | ||||
| -rw-r--r-- | arch/arm/mach-ux500/cpu.c | 14 |
2 files changed, 24 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/db8500.dtsi b/arch/arm/boot/dts/db8500.dtsi index 67423e4fe107..614a471df4a7 100644 --- a/arch/arm/boot/dts/db8500.dtsi +++ b/arch/arm/boot/dts/db8500.dtsi @@ -16,8 +16,19 @@ #address-cells = <1>; #size-cells = <1>; compatible = "stericsson,db8500"; + interrupt-parent = <&intc>; ranges; + intc: interrupt-controller@a0411000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #address-cells = <1>; + interrupt-controller; + interrupt-parent; + reg = <0xa0411000 0x1000>, + <0xa0410100 0x100>; + }; + pmu { compatible = "arm,cortex-a9-pmu"; interrupts = <0 7 0x4>; diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 6242e88e5fd3..d11f3892a27d 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c @@ -16,6 +16,8 @@ #include <linux/err.h> #include <linux/slab.h> #include <linux/stat.h> +#include <linux/of.h> +#include <linux/of_irq.h> #include <asm/hardware/gic.h> #include <asm/mach/map.h> @@ -28,6 +30,11 @@ void __iomem *_PRCMU_BASE; +static const struct of_device_id ux500_dt_irq_match[] = { + { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, + {}, +}; + void __init ux500_init_irq(void) { void __iomem *dist_base; @@ -42,7 +49,12 @@ void __init ux500_init_irq(void) } else ux500_unknown_soc(); - gic_init(0, 29, dist_base, cpu_base); +#ifdef CONFIG_OF + if (of_have_populated_dt()) + of_irq_init(ux500_dt_irq_match); + else +#endif + gic_init(0, 29, dist_base, cpu_base); /* * Init clocks here so that they are available for system timer |