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authorBen Shelton <benjamin.h.shelton@intel.com>2015-10-29 16:20:31 -0500
committerBjorn Helgaas <bhelgaas@google.com>2015-10-29 16:20:31 -0500
commitff45f9ddbcf5418ff6402432d14ad91a40d9bea9 (patch)
treebd79ba2cc8f0d5ca14777ce56b9f44aa17f23621
parent70675e0b6a1ae20f8e93f9fc083d28034ad38948 (diff)
downloadlinux-ff45f9ddbcf5418ff6402432d14ad91a40d9bea9.tar.bz2
PCI: Enable SR-IOV ARI Capable Hierarchy before reading TotalVFs
For some SR-IOV devices, the number of available virtual functions, i.e., TotalVFs, increases after setting the ARI Capable Hierarchy bit in the SR-IOV Control register. This violates the SR-IOV spec, r1.1, sec 3.3.6, which says TotalVFs is HwInit, but we don't need TotalVFs before setting the ARI Capable bit anyway. Set the ARI Capable Hierarchy bit (if ARI is enabled in the upstream bridge) before reading TotalVFs. [bhelgaas: changelog] Signed-off-by: Ben Shelton <benjamin.h.shelton@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-rw-r--r--drivers/pci/iov.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index ee0ebff103a4..0cdb2d1e1a20 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -399,10 +399,6 @@ static int sriov_init(struct pci_dev *dev, int pos)
ssleep(1);
}
- pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
- if (!total)
- return 0;
-
ctrl = 0;
list_for_each_entry(pdev, &dev->bus->devices, bus_list)
if (pdev->is_physfn)
@@ -420,6 +416,10 @@ found:
if (!offset || (total > 1 && !stride))
return -EIO;
+ pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
+ if (!total)
+ return 0;
+
pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
pgsz &= ~((1 << i) - 1);