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authorLinus Walleij <linus.walleij@linaro.org>2019-01-22 10:55:07 +0100
committerLinus Walleij <linus.walleij@linaro.org>2019-01-22 10:55:07 +0100
commitfe4a6485b819560381bcd83926edd86043950cbf (patch)
tree08a0b14895814179b7d91be668097ebb70eec271
parent40e3795851ce50f879e8b54767354324650077b3 (diff)
parent64856974a36178a0b2a1081d4cf3e8c9dd72fc44 (diff)
downloadlinux-fe4a6485b819560381bcd83926edd86043950cbf.tar.bz2
Merge branch 'ib-meson-fixes' into devel
-rw-r--r--Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt10
-rw-r--r--drivers/pinctrl/meson/pinctrl-meson.c24
-rw-r--r--drivers/pinctrl/meson/pinctrl-meson.h1
3 files changed, 22 insertions, 13 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
index 82ead40311f6..a47dd990a8d3 100644
--- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
@@ -23,11 +23,11 @@ The GPIO bank for the controller is represented as a sub-node and it acts as a
GPIO controller.
Required properties for sub-nodes are:
- - reg: should contain address and size for mux, pull-enable, pull and
- gpio register sets
- - reg-names: an array of strings describing the "reg" entries. Must
- contain "mux", "pull" and "gpio". "pull-enable" is optional and
- when it is missing the "pull" registers are used instead
+ - reg: should contain a list of address and size, one tuple for each entry
+ in reg-names.
+ - reg-names: an array of strings describing the "reg" entries.
+ Must contain "mux" and "gpio".
+ May contain "pull", "pull-enable" and "ds" when appropriate.
- gpio-controller: identifies the node as a gpio controller
- #gpio-cells: must be 2
diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c
index ea87d739f534..96a4a72708e4 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.c
+++ b/drivers/pinctrl/meson/pinctrl-meson.c
@@ -31,6 +31,9 @@
* In some cases the register ranges for pull enable and pull
* direction are the same and thus there are only 3 register ranges.
*
+ * Since Meson G12A SoC, the ao register ranges for gpio, pull enable
+ * and pull direction are the same, so there are only 2 register ranges.
+ *
* For the pull and GPIO configuration every bank uses a contiguous
* set of bits in the register sets described above; the same register
* can be shared by more banks with different offsets.
@@ -488,21 +491,26 @@ static int meson_pinctrl_parse_dt(struct meson_pinctrl *pc,
return PTR_ERR(pc->reg_mux);
}
- pc->reg_pull = meson_map_resource(pc, gpio_np, "pull");
- if (IS_ERR(pc->reg_pull)) {
- dev_err(pc->dev, "pull registers not found\n");
- return PTR_ERR(pc->reg_pull);
+ pc->reg_gpio = meson_map_resource(pc, gpio_np, "gpio");
+ if (IS_ERR(pc->reg_gpio)) {
+ dev_err(pc->dev, "gpio registers not found\n");
+ return PTR_ERR(pc->reg_gpio);
}
+ pc->reg_pull = meson_map_resource(pc, gpio_np, "pull");
+ /* Use gpio region if pull one is not present */
+ if (IS_ERR(pc->reg_pull))
+ pc->reg_pull = pc->reg_gpio;
+
pc->reg_pullen = meson_map_resource(pc, gpio_np, "pull-enable");
/* Use pull region if pull-enable one is not present */
if (IS_ERR(pc->reg_pullen))
pc->reg_pullen = pc->reg_pull;
- pc->reg_gpio = meson_map_resource(pc, gpio_np, "gpio");
- if (IS_ERR(pc->reg_gpio)) {
- dev_err(pc->dev, "gpio registers not found\n");
- return PTR_ERR(pc->reg_gpio);
+ pc->reg_ds = meson_map_resource(pc, gpio_np, "ds");
+ if (IS_ERR(pc->reg_ds)) {
+ dev_dbg(pc->dev, "ds registers not found - skipping\n");
+ pc->reg_ds = NULL;
}
return 0;
diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h
index eff61ea1c67e..5eaab925f427 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.h
+++ b/drivers/pinctrl/meson/pinctrl-meson.h
@@ -120,6 +120,7 @@ struct meson_pinctrl {
struct regmap *reg_pullen;
struct regmap *reg_pull;
struct regmap *reg_gpio;
+ struct regmap *reg_ds;
struct gpio_chip chip;
struct device_node *of_node;
};