diff options
| author | Tomer Tayar <Tomer.Tayar@cavium.com> | 2017-05-23 09:41:21 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2017-05-24 15:17:19 -0400 |
| commit | fc561c8bfe831c1509b7f6af3f45fbea78632539 (patch) | |
| tree | f4024fd38c28dcf462fbd2cbaa16fb2f0db4e16d | |
| parent | 4f64675fac061746be112047fab5979e86768a08 (diff) | |
| download | linux-fc561c8bfe831c1509b7f6af3f45fbea78632539.tar.bz2 | |
qed: Log incorrectly installed board
In case nvram layout of board is incorrect, board may exhibit peculiar
oddities. Log such a rare event.
Signed-off-by: Tomer Tayar <Tomer.Tayar@cavium.com>
Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
| -rw-r--r-- | drivers/net/ethernet/qlogic/qed/qed_dev.c | 5 | ||||
| -rw-r--r-- | drivers/net/ethernet/qlogic/qed/qed_hsi.h | 2 |
2 files changed, 7 insertions, 0 deletions
diff --git a/drivers/net/ethernet/qlogic/qed/qed_dev.c b/drivers/net/ethernet/qlogic/qed/qed_dev.c index 9dd28baba5a1..b01df2400075 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_dev.c +++ b/drivers/net/ethernet/qlogic/qed/qed_dev.c @@ -1698,6 +1698,11 @@ int qed_hw_init(struct qed_dev *cdev, struct qed_hw_init_params *p_params) return mfw_rc; } + /* Check if there is a DID mismatch between nvm-cfg/efuse */ + if (param & FW_MB_PARAM_LOAD_DONE_DID_EFUSE_ERROR) + DP_NOTICE(p_hwfn, + "warning: device configuration is not supported on this board type. The device may not function as expected.\n"); + /* send DCBX attention request command */ DP_VERBOSE(p_hwfn, QED_MSG_DCB, diff --git a/drivers/net/ethernet/qlogic/qed/qed_hsi.h b/drivers/net/ethernet/qlogic/qed/qed_hsi.h index eedf79a026a2..4755d0b33b90 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_hsi.h +++ b/drivers/net/ethernet/qlogic/qed/qed_hsi.h @@ -11655,6 +11655,8 @@ struct public_drv_mb { #define FW_MB_PARAM_GET_PF_RDMA_IWARP 0x2 #define FW_MB_PARAM_GET_PF_RDMA_BOTH 0x3 +#define FW_MB_PARAM_LOAD_DONE_DID_EFUSE_ERROR (1 << 0) + u32 drv_pulse_mb; #define DRV_PULSE_SEQ_MASK 0x00007fff #define DRV_PULSE_SYSTEM_TIME_MASK 0xffff0000 |