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authorStafford Horne <shorne@gmail.com>2016-03-21 17:11:10 +0900
committerStafford Horne <shorne@gmail.com>2016-12-12 23:10:19 +0900
commitd01e1f35fee54fd7131e161956e609dfd47c1056 (patch)
tree5eb4184f06b641e8f80709f8334921227eb53916
parent266c7fad157265bb54d17db1c9545f2aaa488643 (diff)
downloadlinux-d01e1f35fee54fd7131e161956e609dfd47c1056.tar.bz2
openrisc: Updates after openrisc.net has been lost
The openrisc.net domain expired and was taken over by squatters. These updates point documentation to the new domain, mailing lists and git repos. Also, Jonas is not the main maintainer anylonger, he reviews changes but does not maintain a repo or sent pull requests. Updating this to add Stafford and Stefan who are the active maintainers. Acked-by: Olof Kindgren <olof.kindgren@gmail.com> Signed-off-by: Stafford Horne <shorne@gmail.com>
-rw-r--r--MAINTAINERS6
-rw-r--r--arch/openrisc/README.openrisc8
-rw-r--r--arch/openrisc/kernel/setup.c2
3 files changed, 9 insertions, 7 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 63cefa62324c..3b1b8e4fa7fe 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8968,9 +8968,11 @@ F: drivers/of/resolver.c
OPENRISC ARCHITECTURE
M: Jonas Bonn <jonas@southpole.se>
-W: http://openrisc.net
+M: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
+M: Stafford Horne <shorne@gmail.com>
+L: openrisc@lists.librecores.org
+W: http://openrisc.io
S: Maintained
-T: git git://openrisc.net/~jonas/linux
F: arch/openrisc/
OPENVSWITCH
diff --git a/arch/openrisc/README.openrisc b/arch/openrisc/README.openrisc
index c9f7edf2b9a2..072069ab5100 100644
--- a/arch/openrisc/README.openrisc
+++ b/arch/openrisc/README.openrisc
@@ -6,7 +6,7 @@ target architecture, specifically, is the 32-bit OpenRISC 1000 family (or1k).
For information about OpenRISC processors and ongoing development:
- website http://openrisc.net
+ website http://openrisc.io
For more information about Linux on OpenRISC, please contact South Pole AB.
@@ -24,17 +24,17 @@ In order to build and run Linux for OpenRISC, you'll need at least a basic
toolchain and, perhaps, the architectural simulator. Steps to get these bits
in place are outlined here.
-1) The toolchain can be obtained from openrisc.net. Instructions for building
+1) The toolchain can be obtained from openrisc.io. Instructions for building
a toolchain can be found at:
-http://openrisc.net/toolchain-build.html
+https://github.com/openrisc/tutorials
2) or1ksim (optional)
or1ksim is the architectural simulator which will allow you to actually run
your OpenRISC Linux kernel if you don't have an OpenRISC processor at hand.
- git clone git://openrisc.net/jonas/or1ksim-svn
+ git clone https://github.com/openrisc/or1ksim.git
cd or1ksim
./configure --prefix=$OPENRISC_PREFIX
diff --git a/arch/openrisc/kernel/setup.c b/arch/openrisc/kernel/setup.c
index 6329d7a493ff..cb797a3beb47 100644
--- a/arch/openrisc/kernel/setup.c
+++ b/arch/openrisc/kernel/setup.c
@@ -295,7 +295,7 @@ void __init setup_arch(char **cmdline_p)
*cmdline_p = boot_command_line;
- printk(KERN_INFO "OpenRISC Linux -- http://openrisc.net\n");
+ printk(KERN_INFO "OpenRISC Linux -- http://openrisc.io\n");
}
static int show_cpuinfo(struct seq_file *m, void *v)