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authorOlof Johansson <olof@lixom.net>2014-03-09 12:01:52 -0700
committerOlof Johansson <olof@lixom.net>2014-03-09 12:02:01 -0700
commitc972aed76742d8dec310a3767d008b8421f4fba3 (patch)
tree7c530b59eab74f0619cb19565a866fd7d0e5a6b9
parent09be3f5ee0892581fcc20204af52c3a354734576 (diff)
parentb4e5e84ddfc57fa269fa50d178ad95d49be33a28 (diff)
downloadlinux-c972aed76742d8dec310a3767d008b8421f4fba3.tar.bz2
Merge tag 'imx-dt-3.15-2' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt
i.MX device tree changes for 3.15, take 2 from Shawn Guo: - Cleanup and device additions for imx27-phytec-phycard boards - eDMA and audio support for vf610-twr board - Minor updates and fixes for a couple of imx28 and imx5 boards * tag 'imx-dt-3.15-2' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: dts: vf610: i2c: Add eDMA support ARM: dts: imx27-phytec-phycore-som: Add USBOTG node ARM: dts: imx27-phytec-phycore-rdk: Add USBH2 node ARM: dts: i.MX27: Add USB nodes ARM: dts: vf610-twr: Add ADC support ARM: dts: mxs: Fix the RTC compatible prop on M28EVK ARM: dts: vf610-twr: Add simple-card support. ARM: dts: vf610-twr: Enable SGTL5000 codec. ARM: dts: vf610-twr: Enable SAI ALSA SoC DAI device ARM: dts: vf610: Add edma mux Tx and Rx support for SAI node. ARM: dts: vf610: lpuart: Add eDMA support ARM: dts: vf610: Add eDMA node ARM: dts: imx27-phytec-phycore: Add diagnostic PMIC LEDs ARM: dts: imx27-phytec-phycard-s-som: Rename file to .dtsi ARM: dts: i.MX51 babbage: Support diagnostic LED ARM: dts: imx28-tx28: Remove 'enable-active-low' property ARM: dts: mx53: Remove 'enable-active-low' property ARM: dts: imx27-phytec-phycard-s-rdk: Add pinctrl definitions for SDHC2 ARM: dts: imx27-phytec-phycard-s-som: Add NFC node ARM: dts: imx27-phytec-phycard-s-som: Sort entries Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r--arch/arm/boot/dts/Makefile1
-rw-r--r--arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts16
-rw-r--r--arch/arm/boot/dts/imx27-phytec-phycard-s-som.dtsi (renamed from arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts)49
-rw-r--r--arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts81
-rw-r--r--arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi44
-rw-r--r--arch/arm/boot/dts/imx27.dtsi56
-rw-r--r--arch/arm/boot/dts/imx28-m28evk.dts2
-rw-r--r--arch/arm/boot/dts/imx28-tx28.dts1
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts17
-rw-r--r--arch/arm/boot/dts/imx53-m53evk.dts1
-rw-r--r--arch/arm/boot/dts/imx53-mba53.dts1
-rw-r--r--arch/arm/boot/dts/imx53-tx53.dtsi1
-rw-r--r--arch/arm/boot/dts/vf610-twr.dts92
-rw-r--r--arch/arm/boot/dts/vf610.dtsi66
14 files changed, 407 insertions, 21 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a4d8b617e5bf..8f7bb77f4322 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -144,7 +144,6 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx27-apf27dev.dtb \
imx27-pdk.dtb \
imx27-phytec-phycore-rdk.dtb \
- imx27-phytec-phycard-s-som.dtb \
imx27-phytec-phycard-s-rdk.dtb \
imx31-bug.dtb \
imx35-eukrea-mbimxsd35-baseboard.dtb \
diff --git a/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
index 04cadfcb32f1..3c3964a99637 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
@@ -9,7 +9,7 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include "imx27-phytec-phycard-s-som.dts"
+#include "imx27-phytec-phycard-s-som.dtsi"
/ {
model = "Phytec pca100 rapid development kit";
@@ -88,6 +88,18 @@
>;
};
+ pinctrl_sdhc2: sdhc2grp {
+ fsl,pins = <
+ MX27_PAD_SD2_CLK__SD2_CLK 0x0
+ MX27_PAD_SD2_CMD__SD2_CMD 0x0
+ MX27_PAD_SD2_D0__SD2_D0 0x0
+ MX27_PAD_SD2_D1__SD2_D1 0x0
+ MX27_PAD_SD2_D2__SD2_D2 0x0
+ MX27_PAD_SD2_D3__SD2_D3 0x0
+ MX27_PAD_SSI3_RXDAT__GPIO3_29 0x0 /* CD */
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX27_PAD_UART1_TXD__UART1_TXD 0x0
@@ -124,6 +136,8 @@
};
&sdhci2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdhc2>;
cd-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts b/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dtsi
index e51e55077aa0..1b6248079682 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dtsi
@@ -29,6 +29,24 @@
status = "okay";
};
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fec1>;
+ status = "okay";
+};
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+
+ at24@52 {
+ compatible = "at,24c32";
+ pagesize = <32>;
+ reg = <0x52>;
+ };
+};
+
&iomuxc {
imx27-phycard-s-som {
pinctrl_fec1: fec1grp {
@@ -60,23 +78,26 @@
MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
>;
};
- };
-};
-&fec {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_fec1>;
- status = "okay";
+ pinctrl_nfc: nfcgrp {
+ fsl,pins = <
+ MX27_PAD_NFRB__NFRB 0x0
+ MX27_PAD_NFCLE__NFCLE 0x0
+ MX27_PAD_NFWP_B__NFWP_B 0x0
+ MX27_PAD_NFCE_B__NFCE_B 0x0
+ MX27_PAD_NFALE__NFALE 0x0
+ MX27_PAD_NFRE_B__NFRE_B 0x0
+ MX27_PAD_NFWE_B__NFWE_B 0x0
+ >;
+ };
+ };
};
-&i2c2 {
+&nfc {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c2>;
+ pinctrl-0 = <&pinctrl_nfc>;
+ nand-bus-width = <8>;
+ nand-ecc-mode = "hw";
+ nand-on-flash-bbt;
status = "okay";
-
- at24@52 {
- compatible = "at,24c32";
- pagesize = <32>;
- reg = <0x52>;
- };
};
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
index 9f8ad51d2ed9..df3b2e731835 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
@@ -81,6 +81,23 @@
>;
};
+ pinctrl_usbh2: usbh2grp {
+ fsl,pins = <
+ MX27_PAD_USBH2_CLK__USBH2_CLK 0x0
+ MX27_PAD_USBH2_DIR__USBH2_DIR 0x0
+ MX27_PAD_USBH2_NXT__USBH2_NXT 0x0
+ MX27_PAD_USBH2_STP__USBH2_STP 0x0
+ MX27_PAD_CSPI2_SCLK__USBH2_DATA0 0x0
+ MX27_PAD_CSPI2_MOSI__USBH2_DATA1 0x0
+ MX27_PAD_CSPI2_MISO__USBH2_DATA2 0x0
+ MX27_PAD_CSPI2_SS1__USBH2_DATA3 0x0
+ MX27_PAD_CSPI2_SS2__USBH2_DATA4 0x0
+ MX27_PAD_CSPI1_SS2__USBH2_DATA5 0x0
+ MX27_PAD_CSPI2_SS0__USBH2_DATA6 0x0
+ MX27_PAD_USBH2_DATA7__USBH2_DATA7 0x0
+ >;
+ };
+
pinctrl_weim: weimgrp {
fsl,pins = <
MX27_PAD_CS4_B__CS4_B 0x0 /* CS4 */
@@ -96,6 +113,56 @@
status = "okay";
};
+&pmicleds {
+ ledr1: led@3 {
+ reg = <3>;
+ label = "system:red1:user";
+ };
+
+ ledg1: led@4 {
+ reg = <4>;
+ label = "system:green1:user";
+ };
+
+ ledb1: led@5 {
+ reg = <5>;
+ label = "system:blue1:user";
+ };
+
+ ledr2: led@6 {
+ reg = <6>;
+ label = "system:red2:user";
+ };
+
+ ledg2: led@7 {
+ reg = <7>;
+ label = "system:green2:user";
+ };
+
+ ledb2: led@8 {
+ reg = <8>;
+ label = "system:blue2:user";
+ };
+
+ ledr3: led@9 {
+ reg = <9>;
+ label = "system:red3:nand";
+ linux,default-trigger = "nand-disk";
+ };
+
+ ledg3: led@10 {
+ reg = <10>;
+ label = "system:green3:live";
+ linux,default-trigger = "heartbeat";
+ };
+
+ ledb3: led@11 {
+ reg = <11>;
+ label = "system:blue3:cpu";
+ linux,default-trigger = "cpu0";
+ };
+};
+
&sdhci2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdhc2>;
@@ -120,6 +187,20 @@
status = "okay";
};
+&usbh2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbh2>;
+ dr_mode = "host";
+ phy_type = "ulpi";
+ vbus-supply = <&reg_5v0>;
+ disable-over-current;
+ status = "okay";
+};
+
+&usbphy2 {
+ vcc-supply = <&reg_5v0>;
+};
+
&weim {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_weim>;
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
index 230cfafa6bd9..cefaa6994623 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
@@ -32,6 +32,14 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
+
+ reg_5v0: regulator@1 {
+ compatible = "regulator-fixed";
+ reg = <1>;
+ regulator-name = "5V0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
};
};
@@ -69,6 +77,12 @@
fsl,mc13xxx-uses-adc;
fsl,mc13xxx-uses-rtc;
+ pmicleds: leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ led-control = <0x001 0x000 0x000 0x000 0x000 0x000>;
+ };
+
regulators {
/* SW1A and SW1B joined operation */
sw1_reg: sw1a {
@@ -236,6 +250,23 @@
MX27_PAD_NFWE_B__NFWE_B 0x0
>;
};
+
+ pinctrl_usbotg: usbotggrp {
+ fsl,pins = <
+ MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0
+ MX27_PAD_USBOTG_DIR__USBOTG_DIR 0x0
+ MX27_PAD_USBOTG_NXT__USBOTG_NXT 0x0
+ MX27_PAD_USBOTG_STP__USBOTG_STP 0x0
+ MX27_PAD_USBOTG_DATA0__USBOTG_DATA0 0x0
+ MX27_PAD_USBOTG_DATA1__USBOTG_DATA1 0x0
+ MX27_PAD_USBOTG_DATA2__USBOTG_DATA2 0x0
+ MX27_PAD_USBOTG_DATA3__USBOTG_DATA3 0x0
+ MX27_PAD_USBOTG_DATA4__USBOTG_DATA4 0x0
+ MX27_PAD_USBOTG_DATA5__USBOTG_DATA5 0x0
+ MX27_PAD_USBOTG_DATA6__USBOTG_DATA6 0x0
+ MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0x0
+ >;
+ };
};
};
@@ -248,6 +279,19 @@
status = "okay";
};
+&usbotg {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg>;
+ dr_mode = "otg";
+ phy_type = "ulpi";
+ vbus-supply = <&sw3_reg>;
+ status = "okay";
+};
+
+&usbphy0 {
+ vcc-supply = <&sw3_reg>;
+};
+
&weim {
status = "okay";
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index 2763cae4b957..6279e0b4f768 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -70,6 +70,26 @@
};
};
+ usbphy {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usbphy0: usbphy@0 {
+ compatible = "usb-nop-xceiv";
+ reg = <0>;
+ clocks = <&clks 75>;
+ clock-names = "main_clk";
+ };
+
+ usbphy2: usbphy@2 {
+ compatible = "usb-nop-xceiv";
+ reg = <2>;
+ clocks = <&clks 75>;
+ clock-names = "main_clk";
+ };
+ };
+
soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -439,6 +459,42 @@
iram = <&iram>;
};
+ usbotg: usb@10024000 {
+ compatible = "fsl,imx27-usb";
+ reg = <0x10024000 0x200>;
+ interrupts = <56>;
+ clocks = <&clks 15>;
+ fsl,usbmisc = <&usbmisc 0>;
+ fsl,usbphy = <&usbphy0>;
+ status = "disabled";
+ };
+
+ usbh1: usb@10024200 {
+ compatible = "fsl,imx27-usb";
+ reg = <0x10024200 0x200>;
+ interrupts = <54>;
+ clocks = <&clks 15>;
+ fsl,usbmisc = <&usbmisc 1>;
+ status = "disabled";
+ };
+
+ usbh2: usb@10024400 {
+ compatible = "fsl,imx27-usb";
+ reg = <0x10024400 0x200>;
+ interrupts = <55>;
+ clocks = <&clks 15>;
+ fsl,usbmisc = <&usbmisc 2>;
+ fsl,usbphy = <&usbphy2>;
+ status = "disabled";
+ };
+
+ usbmisc: usbmisc@10024600 {
+ #index-cells = <1>;
+ compatible = "fsl,imx27-usbmisc";
+ reg = <0x10024600 0x200>;
+ clocks = <&clks 62>;
+ };
+
sahara2: sahara@10025000 {
compatible = "fsl,imx27-sahara";
reg = <0x10025000 0x1000>;
diff --git a/arch/arm/boot/dts/imx28-m28evk.dts b/arch/arm/boot/dts/imx28-m28evk.dts
index 8536b0db9018..f0ad7b9b9d9a 100644
--- a/arch/arm/boot/dts/imx28-m28evk.dts
+++ b/arch/arm/boot/dts/imx28-m28evk.dts
@@ -194,7 +194,7 @@
};
rtc: rtc@68 {
- compatible = "stm,mt41t62";
+ compatible = "stm,m41t62";
reg = <0x68>;
};
};
diff --git a/arch/arm/boot/dts/imx28-tx28.dts b/arch/arm/boot/dts/imx28-tx28.dts
index 3c54e8d152e6..e14bd86f3e99 100644
--- a/arch/arm/boot/dts/imx28-tx28.dts
+++ b/arch/arm/boot/dts/imx28-tx28.dts
@@ -91,7 +91,6 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 0 0>;
- enable-active-low;
pinctrl-names = "default";
pinctrl-0 = <&tx28_flexcan_xcvr_pins>;
};
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index ea5c67e2e0f6..121dadd125c0 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -81,6 +81,17 @@
};
};
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_leds>;
+
+ led-diagnostic {
+ label = "diagnostic";
+ gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
sound {
compatible = "fsl,imx51-babbage-sgtl5000",
"fsl,imx-audio-sgtl5000";
@@ -344,6 +355,12 @@
>;
};
+ pinctrl_gpio_leds: gpioledsgrp {
+ fsl,pins = <
+ MX51_PAD_EIM_D22__GPIO2_6 0x80000000
+ >;
+ };
+
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX51_PAD_KEY_COL4__I2C2_SCL 0x400001ed
diff --git a/arch/arm/boot/dts/imx53-m53evk.dts b/arch/arm/boot/dts/imx53-m53evk.dts
index 7100d08b53c5..e8d11e2a93cd 100644
--- a/arch/arm/boot/dts/imx53-m53evk.dts
+++ b/arch/arm/boot/dts/imx53-m53evk.dts
@@ -103,7 +103,6 @@
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio1 2 0>;
- enable-active-low;
};
};
diff --git a/arch/arm/boot/dts/imx53-mba53.dts b/arch/arm/boot/dts/imx53-mba53.dts
index 0358366c5a17..55af11037a00 100644
--- a/arch/arm/boot/dts/imx53-mba53.dts
+++ b/arch/arm/boot/dts/imx53-mba53.dts
@@ -46,7 +46,6 @@
regulator-name = "lcd-supply";
gpio = <&gpio2 5 0>;
startup-delay-us = <5000>;
- enable-active-low;
};
reg_3p2v: regulator@1 {
diff --git a/arch/arm/boot/dts/imx53-tx53.dtsi b/arch/arm/boot/dts/imx53-tx53.dtsi
index a44403a37af7..e348796ba689 100644
--- a/arch/arm/boot/dts/imx53-tx53.dtsi
+++ b/arch/arm/boot/dts/imx53-tx53.dtsi
@@ -96,7 +96,6 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can_xcvr>;
gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
- enable-active-low;
};
reg_usbh1_vbus: regulator@3 {
diff --git a/arch/arm/boot/dts/vf610-twr.dts b/arch/arm/boot/dts/vf610-twr.dts
index e3a3805c2236..7dd1d6ede525 100644
--- a/arch/arm/boot/dts/vf610-twr.dts
+++ b/arch/arm/boot/dts/vf610-twr.dts
@@ -34,6 +34,64 @@
};
};
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg_3p3v: regulator@0 {
+ compatible = "regulator-fixed";
+ reg = <0>;
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ reg_vcc_3v3_mcu: regulator@1 {
+ compatible = "regulator-fixed";
+ reg = <1>;
+ regulator-name = "vcc_3v3_mcu";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,widgets =
+ "Microphone", "Microphone Jack",
+ "Headphone", "Headphone Jack",
+ "Speaker", "Speaker Ext",
+ "Line", "Line In Jack";
+ simple-audio-card,routing =
+ "MIC_IN", "Microphone Jack",
+ "Microphone Jack", "Mic Bias",
+ "LINE_IN", "Line In Jack",
+ "Headphone Jack", "HP_OUT",
+ "Speaker Ext", "LINE_OUT";
+
+ simple-audio-card,cpu {
+ sound-dai = <&sai2>;
+ master-clkdir-out;
+ frame-master;
+ bitclock-master;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&codec>;
+ frame-master;
+ bitclock-master;
+ };
+ };
+};
+
+&adc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_adc0_ad5>;
+ vref-supply = <&reg_vcc_3v3_mcu>;
+ status = "okay";
};
&dspi0 {
@@ -72,10 +130,25 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c0>;
status = "okay";
+
+ codec: sgtl5000@0a {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ VDDA-supply = <&reg_3p3v>;
+ VDDIO-supply = <&reg_3p3v>;
+ clocks = <&clks VF610_CLK_SAI2>;
+ };
};
&iomuxc {
vf610-twr {
+ pinctrl_adc0_ad5: adc0ad5grp {
+ fsl,pins = <
+ VF610_PAD_PTC30__ADC0_SE5 0xa1
+ >;
+ };
+
pinctrl_dspi0: dspi0grp {
fsl,pins = <
VF610_PAD_PTB19__DSPI0_CS0 0x1182
@@ -121,6 +194,18 @@
>;
};
+ pinctrl_sai2: sai2grp {
+ fsl,pins = <
+ VF610_PAD_PTA16__SAI2_TX_BCLK 0x02ed
+ VF610_PAD_PTA18__SAI2_TX_DATA 0x02ee
+ VF610_PAD_PTA19__SAI2_TX_SYNC 0x02ed
+ VF610_PAD_PTA21__SAI2_RX_BCLK 0x02ed
+ VF610_PAD_PTA22__SAI2_RX_DATA 0x02ed
+ VF610_PAD_PTA23__SAI2_RX_SYNC 0x02ed
+ VF610_PAD_PTB18__EXT_AUDIO_MCLK 0x02ed
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
VF610_PAD_PTB4__UART1_TX 0x21a2
@@ -130,6 +215,13 @@
};
};
+&sai2 {
+ #sound-dai-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sai2>;
+ status = "okay";
+};
+
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
index 107e2c07dd47..804873367669 100644
--- a/arch/arm/boot/dts/vf610.dtsi
+++ b/arch/arm/boot/dts/vf610.dtsi
@@ -88,12 +88,30 @@
arm,tag-latency = <2 2 2>;
};
+ edma0: dma-controller@40018000 {
+ #dma-cells = <2>;
+ compatible = "fsl,vf610-edma";
+ reg = <0x40018000 0x2000>,
+ <0x40024000 0x1000>,
+ <0x40025000 0x1000>;
+ interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>,
+ <0 9 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "edma-tx", "edma-err";
+ dma-channels = <32>;
+ clock-names = "dmamux0", "dmamux1";
+ clocks = <&clks VF610_CLK_DMAMUX0>,
+ <&clks VF610_CLK_DMAMUX1>;
+ };
+
uart0: serial@40027000 {
compatible = "fsl,vf610-lpuart";
reg = <0x40027000 0x1000>;
interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_UART0>;
clock-names = "ipg";
+ dmas = <&edma0 0 2>,
+ <&edma0 0 3>;
+ dma-names = "rx","tx";
status = "disabled";
};
@@ -103,6 +121,9 @@
interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_UART1>;
clock-names = "ipg";
+ dmas = <&edma0 0 4>,
+ <&edma0 0 5>;
+ dma-names = "rx","tx";
status = "disabled";
};
@@ -112,6 +133,9 @@
interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_UART2>;
clock-names = "ipg";
+ dmas = <&edma0 0 6>,
+ <&edma0 0 7>;
+ dma-names = "rx","tx";
status = "disabled";
};
@@ -121,6 +145,9 @@
interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_UART3>;
clock-names = "ipg";
+ dmas = <&edma0 0 8>,
+ <&edma0 0 9>;
+ dma-names = "rx","tx";
status = "disabled";
};
@@ -142,6 +169,9 @@
interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_SAI2>;
clock-names = "sai";
+ dma-names = "tx", "rx";
+ dmas = <&edma0 0 21>,
+ <&edma0 0 20>;
status = "disabled";
};
@@ -153,6 +183,15 @@
clock-names = "pit";
};
+ adc0: adc@4003b000 {
+ compatible = "fsl,vf610-adc";
+ reg = <0x4003b000 0x1000>;
+ interrupts = <0 53 0x04>;
+ clocks = <&clks VF610_CLK_ADC0>;
+ clock-names = "adc";
+ status = "disabled";
+ };
+
wdog@4003e000 {
compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
reg = <0x4003e000 0x1000>;
@@ -246,6 +285,9 @@
interrupts =<0 71 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_I2C0>;
clock-names = "ipg";
+ dmas = <&edma0 0 50>,
+ <&edma0 0 51>;
+ dma-names = "rx","tx";
status = "disabled";
};
@@ -263,6 +305,21 @@
reg = <0x40080000 0x80000>;
ranges;
+ edma1: dma-controller@40098000 {
+ #dma-cells = <2>;
+ compatible = "fsl,vf610-edma";
+ reg = <0x40098000 0x2000>,
+ <0x400a1000 0x1000>,
+ <0x400a2000 0x1000>;
+ interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>,
+ <0 11 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "edma-tx", "edma-err";
+ dma-channels = <32>;
+ clock-names = "dmamux0", "dmamux1";
+ clocks = <&clks VF610_CLK_DMAMUX2>,
+ <&clks VF610_CLK_DMAMUX3>;
+ };
+
uart4: serial@400a9000 {
compatible = "fsl,vf610-lpuart";
reg = <0x400a9000 0x1000>;
@@ -281,6 +338,15 @@
status = "disabled";
};
+ adc1: adc@400bb000 {
+ compatible = "fsl,vf610-adc";
+ reg = <0x400bb000 0x1000>;
+ interrupts = <0 54 0x04>;
+ clocks = <&clks VF610_CLK_ADC1>;
+ clock-names = "adc";
+ status = "disabled";
+ };
+
fec0: ethernet@400d0000 {
compatible = "fsl,mvf600-fec";
reg = <0x400d0000 0x1000>;