diff options
| author | Magnus Damm <damm+renesas@opensource.se> | 2017-10-16 21:30:39 +0900 |
|---|---|---|
| committer | Alex Williamson <alex.williamson@redhat.com> | 2017-11-06 10:29:39 -0700 |
| commit | c295f504fb5a38abbb4094e687ee333a75613a0c (patch) | |
| tree | ada199e9793d0ec6fd8cca72d9ce4f2d9164b499 | |
| parent | f5c858912acd2b17059ebe6f34abac183bdfbf80 (diff) | |
| download | linux-c295f504fb5a38abbb4094e687ee333a75613a0c.tar.bz2 | |
iommu/ipmmu-vmsa: Allow two bit SL0
Introduce support for two bit SL0 bitfield in IMTTBCR
by using a separate feature flag.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
| -rw-r--r-- | drivers/iommu/ipmmu-vmsa.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c index 49f2c697b108..65ad6910cb70 100644 --- a/drivers/iommu/ipmmu-vmsa.c +++ b/drivers/iommu/ipmmu-vmsa.c @@ -45,6 +45,7 @@ struct ipmmu_features { bool has_cache_leaf_nodes; unsigned int number_of_contexts; bool setup_imbuscr; + bool twobit_imttbcr_sl0; }; struct ipmmu_vmsa_device { @@ -144,6 +145,10 @@ static struct ipmmu_vmsa_device *to_ipmmu(struct device *dev) #define IMTTBCR_TSZ0_MASK (7 << 0) #define IMTTBCR_TSZ0_SHIFT O +#define IMTTBCR_SL0_TWOBIT_LVL_3 (0 << 6) +#define IMTTBCR_SL0_TWOBIT_LVL_2 (1 << 6) +#define IMTTBCR_SL0_TWOBIT_LVL_1 (2 << 6) + #define IMBUSCR 0x000c #define IMBUSCR_DVM (1 << 2) #define IMBUSCR_BUSSEL_SYS (0 << 0) @@ -396,6 +401,7 @@ static void ipmmu_domain_free_context(struct ipmmu_vmsa_device *mmu, static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain) { u64 ttbr; + u32 tmp; int ret; /* @@ -449,9 +455,14 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain) * We use long descriptors with inner-shareable WBWA tables and allocate * the whole 32-bit VA space to TTBR0. */ + if (domain->mmu->features->twobit_imttbcr_sl0) + tmp = IMTTBCR_SL0_TWOBIT_LVL_1; + else + tmp = IMTTBCR_SL0_LVL_1; + ipmmu_ctx_write_root(domain, IMTTBCR, IMTTBCR_EAE | IMTTBCR_SH0_INNER_SHAREABLE | IMTTBCR_ORGN0_WB_WA | - IMTTBCR_IRGN0_WB_WA | IMTTBCR_SL0_LVL_1); + IMTTBCR_IRGN0_WB_WA | tmp); /* MAIR0 */ ipmmu_ctx_write_root(domain, IMMAIR0, @@ -889,6 +900,7 @@ static const struct ipmmu_features ipmmu_features_default = { .has_cache_leaf_nodes = false, .number_of_contexts = 1, /* software only tested with one context */ .setup_imbuscr = true, + .twobit_imttbcr_sl0 = false, }; static const struct of_device_id ipmmu_of_ids[] = { |