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author | Sergei Shtylyov <sshtylyov@ru.mvista.com> | 2010-09-27 11:01:32 -0700 |
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committer | David S. Miller <davem@davemloft.net> | 2010-10-26 10:17:29 -0700 |
commit | bbe54d78cc59a39f1ef3ffbe70423376ad9aab4c (patch) | |
tree | 57f31f976c066738ef0f726bab4233786f9087ff | |
parent | 5d3f1a493e19f34ba427936b76f0b5624a2fc62a (diff) | |
download | linux-bbe54d78cc59a39f1ef3ffbe70423376ad9aab4c.tar.bz2 |
hpt366: fix clock turnaround
DPLL clock (0x21) should be used for writes and PCI clock (0x23) for reads,
not vice versa.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/ide/hpt366.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/ide/hpt366.c b/drivers/ide/hpt366.c index c613ae170a84..58c51cddc100 100644 --- a/drivers/ide/hpt366.c +++ b/drivers/ide/hpt366.c @@ -838,7 +838,7 @@ static void hpt3xxn_set_clock(ide_hwif_t *hwif, u8 mode) static void hpt3xxn_rw_disk(ide_drive_t *drive, struct request *rq) { - hpt3xxn_set_clock(drive->hwif, rq_data_dir(rq) ? 0x23 : 0x21); + hpt3xxn_set_clock(drive->hwif, rq_data_dir(rq) ? 0x21 : 0x23); } /** |