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authorAnjali Singhai Jain <anjali.singhai@intel.com>2013-11-28 06:39:20 +0000
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2014-01-03 18:59:51 -0800
commit9c010ee0ea5f87438fe77132130dba0fa29e3b5d (patch)
tree1de189d0f20f9dfd9dcb705288c2a539a2e1526a
parent4836650b1cb20f5d8add4802b344ae232ccec5e9 (diff)
downloadlinux-9c010ee0ea5f87438fe77132130dba0fa29e3b5d.tar.bz2
i40e: Suppress HMC error to Interrupt message level
The HMC error interrupt would generate an un-necessary message "unhandled interrupt", causing extra log spam, in addition to causing a reset that was not necessary. Prevent this issue by handling the HMC error case explicitly, and only reset if the interrupt was from some of the other causes. Change-Id: Iabd203ba1dfc26a136b638597f3e9991acfa29f3 Signed-off-by: Shannon Nelson <shannon.nelson@intel.com> Signed-off-by: Anjali Singhai Jain <anjali.singhai@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Tested-by: Kavindya Deegala <kavindya.s.deegala@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_main.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c
index efdf8a261b9a..f14b31c67e26 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_main.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c
@@ -2814,6 +2814,11 @@ static irqreturn_t i40e_intr(int irq, void *data)
pf->empr_count++;
}
+ if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
+ icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
+ dev_info(&pf->pdev->dev, "HMC error interrupt\n");
+ }
+
/* If a critical error is pending we have no choice but to reset the
* device.
* Report and mask out any remaining unexpected interrupts.
@@ -2822,18 +2827,13 @@ static irqreturn_t i40e_intr(int irq, void *data)
if (icr0_remaining) {
dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
icr0_remaining);
- if ((icr0_remaining & I40E_PFINT_ICR0_HMC_ERR_MASK) ||
- (icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
+ if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
(icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
(icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK) ||
(icr0_remaining & I40E_PFINT_ICR0_MAL_DETECT_MASK)) {
- if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
- dev_info(&pf->pdev->dev, "HMC error interrupt\n");
- } else {
- dev_info(&pf->pdev->dev, "device will be reset\n");
- set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
- i40e_service_event_schedule(pf);
- }
+ dev_info(&pf->pdev->dev, "device will be reset\n");
+ set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
+ i40e_service_event_schedule(pf);
}
ena_mask &= ~icr0_remaining;
}