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authorAlan Tull <atull@opensource.altera.com>2017-03-23 19:34:27 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-04-08 17:45:28 +0200
commit42d5ec954719917e2b7a9160fe05d2316eece5bf (patch)
tree19088b3704312ff5f8f6b4e2790e3963ebb2d4da
parent061c97d13f1a69c0edcab4dc6e97788e5bf3230f (diff)
downloadlinux-42d5ec954719917e2b7a9160fe05d2316eece5bf.tar.bz2
fpga: add config complete timeout
Adding timeout for maximum allowed time for FPGA to go to operating mode after a FPGA region has been programmed. Signed-off-by: Alan Tull <atull@opensource.altera.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/fpga/fpga-region.c3
-rw-r--r--include/linux/fpga/fpga-mgr.h3
2 files changed, 6 insertions, 0 deletions
diff --git a/drivers/fpga/fpga-region.c b/drivers/fpga/fpga-region.c
index 2fe2a52c66ca..ae4c61aada99 100644
--- a/drivers/fpga/fpga-region.c
+++ b/drivers/fpga/fpga-region.c
@@ -385,6 +385,9 @@ static int fpga_region_notify_pre_apply(struct fpga_region *region,
of_property_read_u32(nd->overlay, "region-freeze-timeout-us",
&info->disable_timeout_us);
+ of_property_read_u32(nd->overlay, "config-complete-timeout-us",
+ &info->config_complete_timeout_us);
+
/* If FPGA was externally programmed, don't specify firmware */
if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && firmware_name) {
pr_err("error: specified firmware and external-fpga-config");
diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h
index e2ef94fd37af..b4ac24c4411d 100644
--- a/include/linux/fpga/fpga-mgr.h
+++ b/include/linux/fpga/fpga-mgr.h
@@ -77,11 +77,14 @@ enum fpga_mgr_states {
* @flags: boolean flags as defined above
* @enable_timeout_us: maximum time to enable traffic through bridge (uSec)
* @disable_timeout_us: maximum time to disable traffic through bridge (uSec)
+ * @config_complete_timeout_us: maximum time for FPGA to switch to operating
+ * status in the write_complete op.
*/
struct fpga_image_info {
u32 flags;
u32 enable_timeout_us;
u32 disable_timeout_us;
+ u32 config_complete_timeout_us;
};
/**