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author | Mauro Carvalho Chehab <mchehab@s-opensource.com> | 2017-05-14 11:54:11 -0300 |
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committer | Mauro Carvalho Chehab <mchehab@s-opensource.com> | 2017-05-16 08:44:21 -0300 |
commit | 2a76213072c8d6ac4364455e236d52b7d36601ca (patch) | |
tree | b742d9d8de668ca784619828615d1190119a380b | |
parent | 19285f3c4669c8b0cea8fb6c452c83db9e6386be (diff) | |
download | linux-2a76213072c8d6ac4364455e236d52b7d36601ca.tar.bz2 |
ia64, scsi: update references for the device-io book
The book is now at Documentation/driver-api/device-io.rst.
Update such references.
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
-rw-r--r-- | arch/ia64/include/asm/io.h | 2 | ||||
-rw-r--r-- | arch/ia64/sn/kernel/iomv.c | 2 | ||||
-rw-r--r-- | drivers/scsi/qla1280.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/arch/ia64/include/asm/io.h b/arch/ia64/include/asm/io.h index 5de673ac9cb1..a2540e21f919 100644 --- a/arch/ia64/include/asm/io.h +++ b/arch/ia64/include/asm/io.h @@ -117,7 +117,7 @@ extern int valid_mmap_phys_addr_range (unsigned long pfn, size_t count); * following the barrier will arrive after all previous writes. For most * ia64 platforms, this is a simple 'mf.a' instruction. * - * See Documentation/DocBook/deviceiobook.tmpl for more information. + * See Documentation/driver-api/device-io.rst for more information. */ static inline void ___ia64_mmiowb(void) { diff --git a/arch/ia64/sn/kernel/iomv.c b/arch/ia64/sn/kernel/iomv.c index c77ebdf98119..2b22a71663c1 100644 --- a/arch/ia64/sn/kernel/iomv.c +++ b/arch/ia64/sn/kernel/iomv.c @@ -63,7 +63,7 @@ EXPORT_SYMBOL(sn_io_addr); /** * __sn_mmiowb - I/O space memory barrier * - * See arch/ia64/include/asm/io.h and Documentation/DocBook/deviceiobook.tmpl + * See arch/ia64/include/asm/io.h and Documentation/driver-api/device-io.rst * for details. * * On SN2, we wait for the PIO_WRITE_STATUS SHub register to clear. diff --git a/drivers/scsi/qla1280.c b/drivers/scsi/qla1280.c index 634254a52301..8a29fb09db14 100644 --- a/drivers/scsi/qla1280.c +++ b/drivers/scsi/qla1280.c @@ -3390,7 +3390,7 @@ qla1280_isp_cmd(struct scsi_qla_host *ha) * On PCI bus, order reverses and write of 6 posts, then index 5, * causing chip to issue full queue of stale commands * The mmiowb() prevents future writes from crossing the barrier. - * See Documentation/DocBook/deviceiobook.tmpl for more information. + * See Documentation/driver-api/device-io.rst for more information. */ WRT_REG_WORD(®->mailbox4, ha->req_ring_index); mmiowb(); |