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authorRichard Alpe <richard.alpe@ericsson.com>2012-04-20 15:24:50 +0000
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2012-05-05 05:05:22 -0700
commit1f56f45df9f19cdb87bb90020163046f09df9b45 (patch)
treebe6b3056c85a34fbc98af38389390d294df79c97
parent7b9f7e3500ae118bbd5833425e318647da8901f4 (diff)
downloadlinux-1f56f45df9f19cdb87bb90020163046f09df9b45.tar.bz2
e1000e: clear REQ and GNT in EECD (82571 && 82572)
Clear the REQ and GNT bit in the eeprom control register (EECD). This is required if the eeprom is to be accessed with auto read EERD register. After a cold reset this doesn't matter but if PBIST MAC test was executed before booting, the register was left in a dirty state (the 2 bits where set), which caused the read operation to time out and returning 0. Reference (page 312): http://download.intel.com/design/network/manuals/316080.pdf Reported-by: Aleksandar Igic <aleksandar.igic@dektech.com.au> Signed-off-by: Richard Alpe <richard.alpe@ericsson.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
-rw-r--r--drivers/net/ethernet/intel/e1000e/82571.c12
1 files changed, 11 insertions, 1 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/82571.c b/drivers/net/ethernet/intel/e1000e/82571.c
index 6a8a908f92b8..36db4df09aed 100644
--- a/drivers/net/ethernet/intel/e1000e/82571.c
+++ b/drivers/net/ethernet/intel/e1000e/82571.c
@@ -999,7 +999,7 @@ static s32 e1000_set_d0_lplu_state_82571(struct e1000_hw *hw, bool active)
**/
static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
{
- u32 ctrl, ctrl_ext;
+ u32 ctrl, ctrl_ext, eecd;
s32 ret_val;
/*
@@ -1072,6 +1072,16 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
*/
switch (hw->mac.type) {
+ case e1000_82571:
+ case e1000_82572:
+ /*
+ * REQ and GNT bits need to be cleared when using AUTO_RD
+ * to access the EEPROM.
+ */
+ eecd = er32(EECD);
+ eecd &= ~(E1000_EECD_REQ | E1000_EECD_GNT);
+ ew32(EECD, eecd);
+ break;
case e1000_82573:
case e1000_82574:
case e1000_82583: