diff options
| author | Ursula Braun <ursula.braun@de.ibm.com> | 2013-06-24 13:21:50 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2013-06-25 16:10:14 -0700 |
| commit | a0c98523d7d71e0276f3cb127bc0c6d4fc85907a (patch) | |
| tree | 539f26dab42af068cae11fd79ed3cfafc28bc9ab | |
| parent | fe44014a8287b372e22ef4daf7b682e6378b784f (diff) | |
| download | linux-a0c98523d7d71e0276f3cb127bc0c6d4fc85907a.tar.bz2 | |
qeth: change default standard blkt settings for OSA
blkt settings (or LAN idle settings) for an OSA Express card
determine when and how often an OSA Express card tells the
operating system about new incoming packets. The semantic of
these settings has changed starting with OSA Express3. Currently
the qeth standard settings apply to OSA Express2 and older
generations of OSA Express cards, while new generations of OSA
Express cards require extra coding of their reasonable default.
To cover future OSA Express generations the qeth default standard
blkt setting is now the desired setting for OSA generations
starting with OSA Express3, while the fixed set of older OSA
Express cards receives its blkt settings explicitly.
Signed-off-by: Ursula Braun <ursula.braun@de.ibm.com>
Signed-off-by: Frank Blaschka <blaschka@linux.vnet.ibm.com>
Reviewed-by: Stefan Raspl <raspl@linux.vnet.ibm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
| -rw-r--r-- | drivers/s390/net/qeth_core_main.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/s390/net/qeth_core_main.c b/drivers/s390/net/qeth_core_main.c index f161a10a6579..d7d036bf8715 100644 --- a/drivers/s390/net/qeth_core_main.c +++ b/drivers/s390/net/qeth_core_main.c @@ -1729,14 +1729,14 @@ static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd) QETH_DBF_TEXT(SETUP, 2, "cfgblkt"); if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && - (prcd[76] == 0xF5 || prcd[76] == 0xF6)) { - card->info.blkt.time_total = 250; - card->info.blkt.inter_packet = 5; - card->info.blkt.inter_packet_jumbo = 15; - } else { + prcd[76] >= 0xF1 && prcd[76] <= 0xF4) { card->info.blkt.time_total = 0; card->info.blkt.inter_packet = 0; card->info.blkt.inter_packet_jumbo = 0; + } else { + card->info.blkt.time_total = 250; + card->info.blkt.inter_packet = 5; + card->info.blkt.inter_packet_jumbo = 15; } } |